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MPC8240 数据表(PDF) 39 Page - Motorola, Inc

部件名 MPC8240
功能描述  Integrated Processor Hardware Specifications
PDF  52 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MPC8240 数据表(HTML) 39 Page - Motorola, Inc

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MOTOROLA
MPC8240 Integrated Processor Hardware Specifications
39
System Design Information
Figure 25. COP Connector Diagram
1.7.7
PCI Reference Voltage—LVDD
The MPC8240 PCI reference voltage (LVDD) pins should be connected to 3.3 ±0.3 V power supply if
interfacing the MPC8240 into a 3.3-V PCI bus system. Similarly, the LVDD pins should be connected to
5.0 ±5% V power supply if interfacing the MPC8240 into a 5-V PCI bus system. For either reference
HRESET
HRST_CPU
HRST_CTRL
From Target
Board Sources
HRESET
13
SRESET 5
SRESET 5
SRESET 5
NC
NC
NC
11
VDD_SENSE
6
5 2
15 3
1 k
Ω
10 k
Ω
10 k
Ω
10 k
Ω
OVDD
OVDD
OVDD
OVDD
CHKSTOP_IN 6
CHKSTOP_IN 6
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
12
(if any)
14 4
Key
Notes:
1. QACK is an output on the MPC8240 and is not required at the COP header for emulation.
2. RUN/STOP normally found on pin 5 of the COP header is not implemented on the MPC8240.
Connect pin 5 of the COP header to OVDD with a 1-kΩ pull-up resistor.
3. CKSTP_OUT normally found on pin 15 of the COP header is not implemented on the MPC8240.
Connect pin 15 of the COP header to OVDD with a 10-kΩ pull-up resistor.
4. Pin 14 is not physically present on the COP header.
QACK 1
OVDD
OVDD
10 k
Ω
OVDD
TRST
10 k
Ω
OVDD
10 k
Ω
10 k
Ω
5. SRESET functions as output SDMA12 in extended ROM mode.
6. CHKSTOP_IN functions as output SDMA14 in extended ROM mode.
MPC8240
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
No pin
COP Connector
Physical Pin Out
1
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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