MPC8240 datasheet(10/52 Pages) MOTOROLA

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MPC8240 Integrated Processor Hardware Specifications

MOTOROLA

Electrical and Thermal Characteristics

1.4.1.4

Output Driver Characteristics

Table 4 provides information on the characteristics of the output drivers referenced in Table 17. The values

are from the MPC8240 IBIS model (v1.1 IBIS, v1.2 file) and are untested. For additional detailed

information, see the complete IBIS model listing at: http://www.mot.com/SPS/PowerPC/teksupport/tools/

IBIS/kahlua_1.ibs.txt

Capacitance

Vin = 0 V, f = 1 MHz

Cin

—7.0

Notes:

1. See Table 17 for pins with internal pull-up resistors.

2. See Table 4 for the typical drive capability of a specific signal pin based on the type of output driver associated with

that pin as listed in Table 17.

3. These specifications are for the default driver strengths indicated in Table 4.

4. Leakage current is measured on input pins and on output pins in the high impedance state. The leakage current is

measured for nominal OVDD/LVDD, and VDD or both OVDD/LVDD and VDD must vary in the same direction.

5. The minimum input high voltage is not compliant with the PCI Local Bus Specification (Rev 2.1), which specifies

0.5

× OVDD for minimum input high voltage.

Table 4. Drive Capability of MPC8240 Output Pins

Driver Type

Programmable

Output

Impedance (

Ω)

Supply

Voltage

IOH

IOL

Unit

Notes

DRV_STD

OVDD = 3.3 V

36.7

30.0

2, 4

40 (default)

OVDD = 3.3 V

18.7

15.0

2, 4

DRV_PCI

OVDD = 3.3 V

11.0

20.6

1, 3

50 (default)

OVDD = 3.3 V

5.6

10.3

1, 3

DRV_MEM_ADDR

DRV_PCI_CLK

8 (default)

GVDD = 3.3 V

89.0

76.3

2, 4

13.3

GVDD = 3.3 V

55.9

46.4

2, 4

GVDD = 3.3 V

36.7

30.0

2, 4

GVDD = 3.3 V

18.7

15.0

2, 4

DRV_MEM_DATA

20 (default)

GVDD = 3.3 V

36.7

30.0

2, 4

GVDD = 3.3 V

18.7

15.0

2, 4

Notes:

1. For DRV_PCI, IOH read from the IBIS listing in the pull-up mode, I(Min) column, at the 0.33-V label by interpolating

between the 0.3- and 0.4-V table entries’ current values that correspond to the PCI VOH = 2.97 = 0.9 × OVDD (OVDD

= 3.3 V) where table entry voltage = OVDD – PCI VOH.

2. For all others with GVDD or OVDD = 3.3 V, IOH read from the IBIS listing in the pull-up mode, I(Min) column, at the

0.9-V table entry thatcorresponds to the VOH = 2.4 V where table entry voltage = GVDD/OVDD – VOH.

3. For DRV_PCI, IOL read from the IBIS listing in the pull-down mode, I(Min) column, at 0.33 V = PCI VOL = 0.1 × OVDD

(OVDD = 3.3 V) by interpolating between the 0.3- and 0.4-V table entries.

Table 3. DC Electrical Specifications (continued)

At recommended operating conditions (see Table 2)

Characteristic

Condition 3

Symbol

Min

Max

Unit

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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