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STM32F411CC 数据表(PDF) 148 Page - STMicroelectronics |
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STM32F411CC 数据表(HTML) 148 Page - STMicroelectronics |
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148 / 149 page ![]() Revision history STM32F411xC STM32F411xE 148/149 DocID026289 Rev 6 21-Nov-2016 5 Updated: – Features – Figure 1: Compatible board design for LQFP100 package – Figure 2: Compatible board design for LQFP64 package – Figure 3: STM32F411xC/xE block diagram – Figure 22: High-speed external clock source AC timing diagram – Figure 23: Low-speed external clock source AC timing diagram – Figure 33: I2C bus AC waveforms and measurement circuit – Figure 58: UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package outline – Table 2: STM32F411xC/xE features and peripheral counts – Table 8: STM32F411xC/xE pin definitions – Table 13: Thermal characteristics – Table 14: General operating conditions –From Table 20: Typical and maximum current consumption, code with data processing (ART accelerator disabled) running from SRAM - VDD = 1.7 V to Table 31: Typical and maximum current consumptions in VBAT mode – Table 35: High-speed external user clock characteristics – Table 36: Low-speed external user clock characteristics – Table 39: HSI oscillator characteristics – Table 47: Flash memory endurance and data retention – Table 51: Electrical sensitivities – Table 53: I/O static characteristics – Table 76: Dynamic characteristics: SD / MMC characteristics – Table 86: Ordering information scheme Added: – One-time programmable bytes – Table 85: Package thermal characteristics 05-Dec-2016 6 Updated: – Table 27: Typical and maximum current consumptions in Stop mode - VDD = 1.7 V – Table 28: Typical and maximum current consumption in Stop mode - VDD=3.6 V – Table 29: Typical and maximum current consumption in Standby mode - VDD= 1.7 V – Table 30: Typical and maximum current consumption in Standby mode - VDD= 3.6 V Table 88. Document revision history Date Revision Changes |
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