LED7708 datasheet(36/53 Pages) STMICROELECTRONICS

36 / 53 page

Recommended operating conditions

LED7708

36/53

Doc ID 022698 Rev 1

Warning:

In order to prevent damage to the device or to the external

circuitry, these bits are locked when the DEN bit of DEVCFG0

is asserted.

8.5.8

GSLAT register

The latency is used to insert a programmable delay at the beginning of each dimming period

to implement a certain amount of scanning. The scanning technique is basically a way to

improve the dynamic performance of an LCD panel by powering the backlight only when the

pixels are stable.

The GSLAT register is a write-only register and stores the 16 less significant bits of the

dimming period latency. The additional two most significant bits are located in the

DEVCFG1 register (LAT16 and LAT17 bits). Thanks to the 18-bit wide latency, the LED7708

is capable of supporting down to 20% of scanning waveform (see Section 8.6: Dimming

options for details).

Table 16.

Available LED short detection thresholds

DTS1

DTS0

LED short-circuit detection threshold

LED short detection disabled

LED short detection threshold fixed to 3.4 V

LED short detection threshold fixed to 6.8 V

LED short detection threshold fixed to 8.4 V

LED7708 数据表(PDF) 36 Page - STMicroelectronics