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SRC0 数据表(PDF) 13 Page - STMicroelectronics |
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SRC0 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 48 page ![]() DocID026008 Rev 2 13/48 SRC0 Operation 48 If the system is not responding and the system hangs, the PB and SR push-button can be pressed simultaneously longer than tDEBOUNCE + tINT_Min + tSRD, and then a) either the reset output RST is asserted for tREC and the processor is reset (valid only for the device with option “RST asserted by long push”) – see Figure 18 b) or the power is disabled by EN or EN signal (valid only for the device with option “EN deasserted by long push”) – see Figure 19 The tSRD is set by the external capacitor connected to the CSRD pin. SR input is monitored for falling edge after power-up and must not be grounded permanently. Standby If the enable output is deasserted (i.e. EN is low or EN is high), the STM660x device enters standby mode with low current consumption (see Table 5). In standby mode PB input is only monitored for the falling edge. The external 1.5 V voltage reference is also disabled in standby mode. |
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