数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST7MC1K2 数据表(PDF) 171 Page - STMicroelectronics

部件名 ST7MC1K2
功能描述  Clock, reset and supply management
PDF  371 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2 数据表(HTML) 171 Page - STMicroelectronics

Back Button ST7MC1K2 Datasheet HTML 167Page - STMicroelectronics ST7MC1K2 Datasheet HTML 168Page - STMicroelectronics ST7MC1K2 Datasheet HTML 169Page - STMicroelectronics ST7MC1K2 Datasheet HTML 170Page - STMicroelectronics ST7MC1K2 Datasheet HTML 171Page - STMicroelectronics ST7MC1K2 Datasheet HTML 172Page - STMicroelectronics ST7MC1K2 Datasheet HTML 173Page - STMicroelectronics ST7MC1K2 Datasheet HTML 174Page - STMicroelectronics ST7MC1K2 Datasheet HTML 175Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 171 / 371 page
background image
Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
171/371
SCI control register 1 (SCICR1)
2NF
Noise flag
In LIN master mode (LINE bit = 1 and LSLV bit = 0) this bit has the same function as in
SCI mode, please refer to SCI status register (SCISR) on page 152.
In LIN slave mode (LINE bit = 1 and LSLV bit = 1) this bit has no meaning.
1FE
Framing error
In LIN slave mode, this bit is set only when a real framing error is detected (if the stop
bit is dominant (0) and at least one of the other bits is recessive (1). It is not set when
a break occurs, the LHDF bit is used instead as a break flag (if the LHDM bit = 0). It is
cleared by a software sequence (an access to the SCISR register followed by a read
to the SCIDR register).
0: No framing error
1: Framing error detected
0PE
Parity error
This bit is set by hardware when a LIN parity error occurs (if the PCE bit is set) in
receiver mode. It is cleared by a software sequence (a read to the status register
followed by an access to the SCIDR data register). An interrupt is generated if PIE = 1
in the SCICR1 register.
0: No LIN parity error
1: LIN parity error detected
1.
Bits 7:4 have the same function as in SCI mode, please refer to SCI status register (SCISR) on page 152.
SCICR1
Reset value: x000 0000 (x0h)
7
654
32
10
R8
T8
SCID
M
WAKE
PCE
Reserved
PIE
R/W
R/W
R/W
R/W
R/W
R/W
-
R/W
Table 69.
SCICR1 register description(1)
Bit Name
Function
7
R8
Receive data bit 8
This bit is used to store the 9th bit of the received word when M = 1.
6T8
Transmit data bit 8
This bit is used to store the 9th bit of the transmitted word when M = 1.
5SCID
Disabled for low power consumption
When this bit is set the SCI prescalers and outputs are stopped and the end of the
current byte transfer in order to reduce power consumption.This bit is set and cleared
by software.
0: SCI enabled
1: SCI prescaler and outputs disabled
Table 68.
SCISR register description(1) (continued)
Bit Name
Function
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com