ST7MC1K2 datasheet(226/371 Pages) STMICROELECTRONICS

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Table 98.

Step frequency/period range (4 MHz)

Step ratio bits ST[3:0] in MPRSR register

Step frequency

Step period

Maximum

Minimum

Maximum

0000

23.5 kHz

7.85 kHz

42.5 µs

127.5 µs

0001

11.7 kHz

3.93 kHz

85 µs

255 µs

0010

5.88 kHz

1.96 kHz

170 µs

510 µs

0011

2.94 kHz

980 Hz

340 µs

1.02 ms

0100

1.47 kHz

490 Hz

680 µs

2.04 ms

0101

735 Hz

245Hz

1.36ms

4.08ms

0110

367 Hz

123Hz

2.72ms

8.16ms

0111

183 Hz

61.3 Hz

5.44 ms

16.32 ms

1000

91.9 Hz

30.7 Hz

10.9 ms

32.6 ms

1001

45.9 Hz

15.4 Hz

21.8 ms

65.2 ms

1010

22.9 Hz

7.66 Hz

43.6 ms

130 ms

1011

11.4 Hz

3.83 Hz

87 ms

261 ms

1100

5.74Hz

1.92Hz

174 ms

522ms

1101

2.87 Hz

0.958 Hz

349 ms

1.04 s

1110

1.43 Hz

0.479 Hz

697 ms

2.08 s

1111

0.718 Hz

0.240 Hz

1.40 s

4.17 s

Table 99.

modes of accessing mtim timer-related registers

State of MCRA/MCRB/MPAR register bits

Access to MTIM timer related registers

RST

bit

TES

[1:0]

SWA

bit

CKE

bit

Mode

Read only

access

Read/write access

0xx

Configuration

mode

MTIM, MTIML, MZPRV, MZREG, MCOMP, MDREG,

ST[3:0]

Switched mode MTIM, ST[3:0]

MCOMP, MDREG, MZREG, MZPRV RMI bit of

MISR:

0: no action

1: decrement ST[3:0]

RPI bit of MISR:

0: no action

1: increment ST[3:0]

000

Autoswitched

mode

MTIM, ST[3:0]

MDREG, MCOMP, MZREG, MZPRV, RMI, RPI bit of

MISR:

Set by hardware, (increment ST[3:0]), cleared by

software

Speed sensor

mode

MTIM, MTIML,

ST[3:0]

MDREG, MZREG, MZPRV, RMI, RPI bit of MISR:

Set by hardware, (increment or decrement

ST[3:0]), cleared by software.

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