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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7MC1K2 数据表(PDF) 279 Page - STMicroelectronics |
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ST7MC1K2 数据表(HTML) 279 Page - STMicroelectronics |
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279 / 371 page  Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto On-chip peripherals 279/371 Compare phase U preload register low (MCPUL) Compare 0 preload register high (MCP0H) Compare 0 preload register low (MCP0L) Note: 1 The 16-bit compare registers MCMPOx, MCMPUx, MCMPVx, MCMPWx MSB and LSB parts have to be written sequentially before being taken into account when an update event occurs; refer to PWM operating mode on page 254 for details. MCPUL Reset value: 0000 0000 (00h) 7 654 32 10 CPUL[7:3] Reserved R/W - Table 151. MCPUL register description Bit Name Function 7:5 CPUL[7:3] Low bits of phase U preload value 2:0 - Reserved MCP0H Reset value: 0000 1111 (0Fh) 7 654 32 10 Reserved CP0H[3:0] -R/W Table 152. MCP0H register description Bit Name Function 7:4 - Reserved 3:0 CP0H[3:0] Most significant bits of compare 0 preload value MCP0L Reset value: 1111 1111 (FFh) 7 654 32 10 CP0L[7:0] R/W Table 153. MCP0L register description Bit Name Function 7:0 CP0L[7:0] Low byte of compare 0 preload value Obsolete Product(s) - Obsolete Product(s) |
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