ST72321R9-Auto datasheet(90/243 Pages) STMICROELECTRONICS

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PWM auto-reload timer (ART)

ST72321xx-Auto

90/243

Doc ID 13829 Rev 1

Figure 37.

PWM auto-reload timer function

Figure 38.

PWM signal from 0% to 100% duty cycle

12.2.6

Output compare and time base interrupt

On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is

generated if the overflow interrupt enable bit, OIE, in the ARTCSR register, is set. The OVF

flag must be reset by the user software. This interrupt can be used as a time base in the

application.

12.2.7

External clock and event detector mode

Using the fEXT external prescaler input clock, the auto-reload timer can be used as an

external clock event detector. In this mode, the ARTARR register is used to select the

nEVENT number of events to be counted before setting the OVF flag.

nEVENT = 256 - ARTARR

Caution:

The external clock function is not available in Halt mode. If Halt mode is used in the

application, prior to executing the HALT instruction, the counter must be disabled by clearing

the TCE bit in the ARTCSR register to avoid spurious counter increments.

DUTY CYCLE

AUTO-RELOAD

255

000

WITH OEx=1

AND OPx=0

(ARTARR)

(PWMDCRx)

WITH OEx=1

AND OPx=1

COUNTER

FDh

FEh

FFh

FDh

FEh

FFh

FDh

FEh

OCRx=FCh

OCRx=FDh

OCRx=FEh

OCRx=FFh

ARTARR = FDh

fCOUNTER

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