| 数据搜索系统,热门电子元器件搜索 |
|
STM8L151C4 数据表(PDF) 81 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L151C4 数据表(HTML) 81 Page - STMicroelectronics |
|
81 / 142 page ![]() DocID15962 Rev 15 81/142 STM8L151x4/6, STM8L152x4/6 Electrical parameters 115 Current consumption of on-chip peripherals Table 27. Peripheral current consumption Symbol Parameter Typ. VDD = 3.0 V Unit IDD(TIM1) TIM1 supply current(1) 13 µA/MHz IDD(TIM2) TIM2 supply current (1) 8 IDD(TIM3) TIM3 supply current (1) 8 IDD(TIM4) TIM4 timer supply current (1) 3 IDD(USART1) USART1 supply current (2) 6 IDD(SPI1) SPI1 supply current (2) 3 IDD(I2C1) I2C1 supply current (2) 5 IDD(DMA1) DMA1 supply current(2) 3 IDD(WWDG) WWDG supply current(2) 2 IDD(ALL) Peripherals ON(3) 44 µA/MHz IDD(ADC1) ADC1 supply current(4) 1500 µA IDD(DAC) DAC supply current(5) 370 µA IDD(COMP1) Comparator 1 supply current(6) 0.160 µA IDD(COMP2) Comparator 2 supply current(6) Slow mode 2 Fast mode 5 IDD(PVD/BOR) Power voltage detector and brownout Reset unit supply current (7) 2.6 IDD(BOR) Brownout Reset unit supply current (7) 2.4 IDD(IDWDG) Independent watchdog supply current including LSI supply current 0.45 excluding LSI supply current 0.05 1. Data based on a differential IDD measurement between all peripherals OFF and a timer counter running at 16 MHz. The CPU is in Wait mode in both cases. No IC/OC programmed, no I/O pins toggling. Not tested in production. 2. Data based on a differential IDD measurement between the on-chip peripheral in reset configuration and not clocked and the on-chip peripheral when clocked and not kept under reset. The CPU is in Wait mode in both cases. No I/O pins toggling. Not tested in production. 3. Peripherals listed above the IDD(ALL) parameter ON: TIM1, TIM2, TIM3, TIM4, USART1, SPI1, I2C1, DMA1, WWDG. 4. Data based on a differential IDD measurement between ADC in reset configuration and continuous ADC conversion. 5. Data based on a differential IDD measurement between DAC in reset configuration and continuous DAC conversion of VDD /2. Floating DAC output. 6. Data based on a differential IDD measurement between COMP1 or COMP2 in reset configuration and COMP1 or COMP2 enabled with static inputs. Supply current of internal reference voltage excluded. 7. Including supply current of internal reference voltage. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |