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STM8L151C4 数据表(PDF) 96 Page - STMicroelectronics |
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STM8L151C4 数据表(HTML) 96 Page - STMicroelectronics |
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96 / 142 page  Electrical parameters STM8L151x4/6, STM8L152x4/6 96/142 DocID15962 Rev 15 Figure 32. Typical NRST pull-up current Ipu vs VDD The reset network shown in Figure 33 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max. level specified in Table 42. Otherwise the reset is not taken into account internally. For power consumption sensitive applications, the external reset capacitor value can be reduced to limit the charge/discharge current. If the NRST signal is used to reset the external circuitry, attention must be paid to the charge/discharge time of the external capacitor to fulfill the external devices reset timing conditions. The minimum recommended capacity is 10 nF. Figure 33. Recommended NRST pin configuration |
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