STM8L151C4 datasheet(36/142 Pages) STMICROELECTRONICS

36 / 142 page

Pinout and pin description

STM8L151x4/6, STM8L152x4/6

36/142

DocID15962 Rev 15

Note:

The slope control of all GPIO pins, except true open drain pins, can be programmed. By

default, the slope control is limited to 2 MHz.

-8

7 G4 VDD1/VDDA/VREF+

S-

Digital power supply / Analog

supply voltage / ADC1 positive

voltage reference

6 F4 VSS1/VSSA/VREF-

S-

I/O ground / Analog ground voltage

ADC1 negative voltage reference

- VDD2

S-

- IOs supply voltage

- VSS2

S-

- IOs ground voltage

132 28 A4

PA0(9)/[USART1_CK](4)/

SWIM/BEEP/IR_TIM (10)

I/O

X X(9) X

(10)

XX Port A0

[USART1 synchronous

clock](4) / SWIM input

and output /

Beep output / Infrared

Timer output

1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be

configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1

pin as general purpose output in the STM8L15x and STM8L16x reference manual (RM0031).

2. Available on STM8L152xx devices only.

3. In the 3.6 V tolerant I/Os, protection diode to VDD is not implemented.

[ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a

duplication of the function).

5. In the 5 V tolerant I/Os, protection diode to VDD is not implemented.

6. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release.

7. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer, weak pull-up and protection diode to VDD are

not implemented).

8. Available on STM8L151xx devices only.

9. The PA0 pin is in input pull-up during the reset phase and after reset release.

10. High Sink LED driver capability available on PA0.

Table 5. Medium-density STM8L151x4/6, STM8L152x4/6 pin description (continued)

number

Pin name

Input

Output

Default alternate

function

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