eZ80F91 datasheet(6/30 Pages) ZILOG

6 / 30 page

PS026102-1207

Zdots® SBC for eZ80AcclaimPlus!™ Connectivity ASSP

Product Specification

eZ80AcclaimPlus!TM Connectivity ASSP Features

Features of eZ80AcclaimPlus! Connectivity ASSP include:

• Single-cycle instruction fetch, high-performance, pipelined eZ80® CPU core

• 256 KB of Flash memory and 8 KB of SRAM

• 10/100 Mbps Ethernet MAC with 8 KB frame buffer

• Low power features including SLEEP mode, HALT mode, and selective peripheral

power-down control

• Two UARTs with independent baud rate generators and support for 9-bit operation

• SPI with independent clock generator

• I2C with independent clock generator

• Infrared data association (IrDA)-compliant infrared encoder/decoder

• New DMA-like eZ80 instructions for efficient block data transfer

• External interface with four chip selects, individual wait state generators, and an external

WAIT input pin—supports Intel- and Motorola-style buses

• Flexible-priority vectored interrupts (both internal and external) and interrupt controller

• Real-time clock with on-chip 32 kHz oscillator, selectable 50/60 Hz input, and separate

VDD pin for battery backup

• Four 16-bit Counter/Timers with prescalers and direct input/output drive

• Watchdog Timer (WDT)

• 32 bits of general-purpose input/output (GPIO)

• JTAG and ZDI debug interfaces

• 144-pin LQFP package

• Supply voltage of 3.0 V to 3.6 V with 5 V tolerant inputs

• Standard operating temperature range: 0 ºC to +70 ºC

eZ80F91 数据表(PDF) 6 Page - Zilog, Inc.