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CS5532-AS 数据表(PDF) 29 Page - Cirrus Logic

部件名 CS5532-AS
功能描述  16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
PDF  52 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS5532-AS 数据表(HTML) 29 Page - Cirrus Logic

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CS5531/32/33/34
DS289PP5
29
Filter Rate Select, FRS[19]
0
Use the default output word rates.
1
Scale all output word rates and their corresponding filter characteristics by a factor of 5/6.
NU (Not Used)[18:0]
0
Must always be logic 0. Reserved for future upgrades.
2.4. Setting up the CSRs for a Measurement
The CS5531/32/33/34 have four Channel-Setup
Registers (CSRs). Each CSR contains two 16-bit
Setups which are programmed by the user to contain
data conversion information such as: 1) which phys-
ical channel will be converted, 2) at what gain will
the channel be converted, 3) at what word rate will
the channel be converted, 4) will the output conver-
sion be unipolar or bipolar, 5) what will be the state
of the output latch during the conversion, 6) will the
converter delay the start of a conversion to allow
time for the output latch to settle before the conver-
sion is begun, and 7) will the open circuit detect cur-
rent source be activated for that Setup. In addition,
when the OGS bit in the Configuration Register is
set, the Setup selects which set of offset and gain
registers to use when performing conversions or cal-
ibrations. Note that a particular physical input chan-
nel can be represented in more than one Setup with
different output rates, gain ranges, etc. (i.e. each
Setup is independently defined). Refer to section
2.4.1 for more details about the Channel Setup
Registers.
Each 32-bit CSR is individually accessible and
contains two 16-bit Setups. As an example, to con-
figure Setup 1 in the CS5531/32/33/34 with the
write individual channel-setup register command
(0x05 hexadecimal), bits 31 to 16 of CSR 1 con-
tains the information for Setup 1 and bits 15 to 0
contain the information for Setup 2. Note that while
reading/writing CSRs, two Setups are accessed in
pairs as a single 32-bit CSR register. Even if one of
the Setups isn’t used, it must be written to or read.
Examples detailing the power of the CSRs are pro-
vided in section 2.6.3.



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