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M95M01-R 数据表(PDF) 20 Page - STMicroelectronics

部件名 M95M01-R
功能描述  1-Mbit serial SPI bus EEPROM
PDF  51 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95M01-R 数据表(HTML) 20 Page - STMicroelectronics

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Instructions
M95M01-DF M95M01-R
20/51
DocID13264 Rev 14
6.3.4
SRWD bit
The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write
Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect (W)
signal enable the device to be put in the Hardware Protected mode (when the Status
Register Write Disable (SRWD) bit is set to 1, and Write Protect (W) is driven low). In this
mode, the non-volatile bits of the Status Register (SRWD, BP1, BP0) become read-only bits
and the Write Status Register (WRSR) instruction is no longer accepted for execution.
Table 4. Status Register format
b7
b0
SRWD
0
0
0
BP1
BP0
WEL
WIP
Status Register Write Protect
Block Protect bits
Write Enable Latch bit
Write In Progress bit



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