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ST8034HC 数据表(PDF) 23 Page - STMicroelectronics |
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ST8034HC 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 31 page ![]() DocID024511 Rev 2 23/31 ST8034HN, ST8034HC Functional description 6.6 Deep shutdown mode When the smartcard reader is inactive, the ST8034HN and ST8034HC enter a deep shutdown mode if the CMDVCC pin is forced high and the VCC_SEL1 and VCC_SEL2 pins are low. In deep shutdown mode, all circuits are disabled and the OFF pin follows the status of the PRES pin. Changing the status of either CMDVCC, VCC_SEL1 or VCC_SEL2 exits the deep shutdown mode, see Figure 9. Figure 9. Shutdown and deep shutdown mode activation and deactivation 6.7 Activation sequence The following device activation sequence is applied when using an external clock, also see Figure 10: 1. CMDVCC is pulled low (t0). 2. The internal oscillator is triggered (t0). 3. The internal oscillator changes to high frequency (t1). 4. VCC rises from 0 V to 1.8 V or to 3 V or to 5 V on a controlled slope (t2). 5. I/O, AUX1, AUX2 are driven high (t3). 6. The clock on the CLK output is applied to the C3 contact (t4). 7. RST is enabled (t5). |
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