ST8034HC datasheet(24/31 Pages) STMICROELECTRONICS

24 / 31 page

Functional description

ST8034HN, ST8034HC

24/31

DocID024511 Rev 2

Time delays



t1 = t0 + 384 × 1/fOSC(INT)LOW



t2 = t1



t3 (tD(START)) = t1 + 17T/2



t4 = driven by host microcontroller; > t3 and < t5



t5 (tD(END)) = t1 + 23T/2.

T = 64 x 1/fOSC(INT).

Figure 10. Activation sequence

6.8

Deactivation sequence

When a session ends, the microcontroller sets CMDVCC high. The ST8034 device then

executes an automatic deactivation sequence by counting the sequencer back to the

inactive state (see Figure 11):

RST goes low (t11).

The clock is stopped, CLK is low (t12).

I/O, AUX1, AUX2 are pulled low (t13).

VCC falls to 0 V (t14). The deactivation sequence is completed when VCC reaches its

inactive state.

VCC < 0.4 V (tDEACT).

All card contacts become low impedance to GND. The I/OUC, AUX1UC and AUX2UC

pins remain pulled up to VDD(INTF) by the internal 10 k pull-up resistor.

The internal oscillator returns to its low frequency mode.

ST8034HC 数据表(PDF) 24 Page - STMicroelectronics