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R5F100GC 数据表(PDF) 34 Page - Renesas Technology Corp |
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R5F100GC 数据表(HTML) 34 Page - Renesas Technology Corp |
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34 / 202 page  RL78/G13 1. OUTLINE Page 34 of 196 R01DS0131EJ0330 Rev.3.30 Mar 31, 2016 1.5 Block Diagram 1.5.1 20-pin products PORT 1 P10 to P12, P16, P17 PORT 2 P20 to P22 3 PORT 3 P30 PORT 4 5 PORT 12 P121, P122 P40 VOLTAGE REGULATOR REGC INTERRUPT CONTROL RAM LOW-SPEED ON-CHIP OSCILLATOR POWER ON RESET/ VOLTAGE DETECTOR POR/LVD CONTROL RESET CONTROL SYSTEM CONTROL RESET X1/P121 X2/EXCLK/P122 HIGH-SPEED ON-CHIP OSCILLATOR ON-CHIP DEBUG TOOL0/P40 SERIAL ARRAY UNIT0 (4ch) UART0 UART1 IIC00 RxD0/P11 TxD0/P12 RxD1/P01 TxD1/P00 SCL00/P10 SDA00/P11 TIMER ARRAY UNIT (8ch) ch2 TI02/TO02/P17 ch3 ch0 ch1 ch4 ch5 ch6 ch7 INTP0/P137 INTP3/P30 A/D CONVERTER 3 ANI0/P20 to ANI2/P22 AVREFP/P20 AVREFM/P21 2 PORT 13 P137 CSI11 SCK11/P30 SO11/P16 SI11/P17 IIC11 SCL11/P30 SDA11/P17 TI00/P00 TO00/P01 BCD ADJUSTMENT 12-BIT INTERVAL TIMER SCK00/P10 SO00/P12 SI00/P11 CSI00 VSS TOOLRxD/P11, TOOLTxD/P12 VDD INTP5/P16 PORT 0 P00, P01 2 WINDOW WATCHDOG TIMER REAL-TIME CLOCK 3 ANI16/P01, ANI17/P00, ANI18/P147 DIRECT MEMORY ACCESS CONTROL PORT 14 P147 TI01/TO01/P16 MULTIPLIER& DIVIDER, MULITIPLY- ACCUMULATOR RL78 CPU CORE CODE FLASH MEMORY DATA FLASH MEMORY CRC |
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