R5F100GC datasheet(48/202 Pages) RENESAS

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RL78/G13

1. OUTLINE

Page 48 of 196

R01DS0131EJ0330 Rev.3.30

Mar 31, 2016

1.6 Outline of Functions

[20-pin, 24-pin, 25-pin, 30-pin, 32-pin, 36-pin products]

Caution

This outline describes the functions at the time when Peripheral I/O redirection register (PIOR)

is set to 00H.

(1/2)

20-pin

24-pin

25-pin

30-pin

32-pin

36-pin

Item

Code flash memory (KB)

16 to 64

16 to 128

Data flash memory (KB)



4 to 8



4 to 8



4 to 8



RAM (KB)

2 to 4

Note1

2 to 4

Note1

2 to 4

Note1

2 to 12

Note1

2 to 12

Note1

2 to 12

Note1

Address space

1 MB

High-speed system

clock

X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)

HS (High-speed main) mode: 1 to 20 MHz (VDD = 2.7 to 5.5 V),

HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)

Main system

clock

High-speed on-chip

oscillator

HS (High-speed main) mode: 1 to 32 MHz (VDD = 2.7 to 5.5 V),

HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)

Subsystem clock



Low-speed on-chip oscillator

15 kHz (TYP.)

General-purpose registers

(8-bit register

 8)  4 banks

0.03125

s (High-speed on-chip oscillator: fIH = 32 MHz operation)

Minimum instruction execution time

0.05

s (High-speed system clock: fMX = 20 MHz operation)

Instruction set

 Data transfer (8/16 bits)

 Adder and subtractor/logical operation (8/16 bits)

 Multiplication (8 bits  8 bits)

 Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.

I/O port

Total

CMOS I/O

(N-ch O.D. I/O

[VDD withstand

voltage]: 5)

(N-ch O.D. I/O

[VDD withstand

voltage]: 6)

(N-ch O.D. I/O

[VDD withstand

voltage]: 6)

(N-ch O.D. I/O

[VDD withstand

voltage]: 9)

(N-ch O.D. I/O

[VDD withstand

voltage]: 9)

(N-ch O.D. I/O

[VDD withstand

voltage]: 10)

CMOS input

CMOS output



N-ch O.D. I/O

(withstand voltage: 6 V)



16-bit timer

8 channels

Watchdog timer

1 channel

Timer

Real-time clock (RTC)

1 channel

Note 2

12-bit interval timer (IT)

1 channel

Timer output

3 channels

(PWM outputs:

Note 3)

4 channels

(PWM outputs: 3

Note 3)

4 channels (PWM outputs: 3

Note 3),

8 channels (PWM outputs: 7

Note 3) Note 4

RTC output



Notes 1.

The flash library uses RAM in self-programming and rewriting of the data flash memory.

The target products and start address of the RAM areas used by the flash library are shown below.

R5F100xD, R5F101xD (x = 6 to 8, A to C): Start address FF300H

R5F100xE, R5F101xE (x = 6 to 8, A to C):

Start address FEF00H

For the RAM areas used by the flash library, see Self RAM list of Flash Self-Programming Library

for RL78 Family (R20UT2944).

Only the constant-period interrupt function when the low-speed on-chip oscillator clock (fIL) is

selected

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