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AD9953ASV 数据表(PDF) 27 Page - Analog Devices |
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AD9953ASV 数据表(HTML) 27 Page - Analog Devices |
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27 / 42 page ![]() PRELIMINARY TECHNICAL DATA AD9953 Continuous Bi-directional Ramp mode allows the AD9953 to offer an automatic symmetrical sweep between two frequencies. The AD9953 is programmed for Continuous Bi-directional Ramp mode by writing the RAM Enable bit true and the RAM Mode Control bits of each profile to be used to logic 011(b). Upon entering this mode (via an I/O UPDATE or changing Profile<1:0>), the RAM address generator loads the RAM Segment Beginning Address bits of the current RSCW and the Ramp Rate Timer loads the RAM Segment Address Ramp Rate bits. The RAM drives data from the beginning address and the ramp rate timer begins to count down to 1. When the ramp rate timer completes a cycle, the RAM address generator increments to the next address, the timer reloads the ramp rate bits and continues counting down. This sequence continues until the RAM address generator has incremented to an address equal to the RAM Segment Final Address bits of the current RSCW. Upon reaching this terminal address, the RAM address generator will decrement in value at the ramp rate until it reaches the RAM Segment Beginning address. Upon reaching the beginning address, the entire sequence repeats. The entire sequence repeats for as long as the part is programmed for this mode. The No Dwell bit is a “don’t care” in this mode. In general, this mode is identical in control to the Bi-directional Ramp Mode except the ramp up and down is automatic (no external control via the Profile<0> input) and switching profiles is valid. Once in this mode, the address generator ramps from beginning address to final address back to beginning address at the rate programmed into the ramp rate register. This mode enables generation of an automatic saw tooth sweep characteristic. Notes to the Continuous Bi-directional Ramp mode: 1) The user must insure that the beginning address is lower than the final address. 2) Changing profiles or issuing an I/O UPDATE automatically terminates the current sweep and starts the next sweep. 3) Setting the RAM destination bit true such that the RAM output drives the phase-offset adder is valid. While the above discussion describes a frequency sweep, a phase sweep operation is also available. Continuous Re-circulate Mode Continuous Re-circulate mode allows the AD9953 to offer an automatic, continuous unidirectional sweep between two frequencies. The AD9953 is programmed for Continuous Re-circulate mode by writing the RAM Enable bit true and the RAM Mode Control bits of each profile to be used to logic 100(b). Upon entering this mode (via an I/O UPDATE or changing Profile<1:0>), the RAM address generator loads the RAM Segment Beginning Address bits of the current RSCW and the Ramp Rate Timer loads the RAM Segment Address Ramp Rate bits. The RAM drives data from the REV. PrB 1/30/03 Page 27 Analog Devices, Inc. |
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