AD9953ASV datasheet(28/42 Pages) AD

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PRELIMINARY TECHNICAL DATA

AD9953

beginning address and the ramp rate timer begins to count down to 1. When the ramp rate timer

completes a cycle, the RAM address generator increments to the next address, the timer reloads the

ramp rate bits and continues counting down. This sequence continues until the RAM address

generator has incremented to an address equal to the RAM Segment Final Address bits of the

current RSCW. Upon reaching this terminal address, the RAM address generator reloads the RAM

Segment Beginning Address bits and the sequence repeats.

The sequence of circulating through the specified RAM addresses repeats for as long as the part is

programmed for this mode. The No Dwell bit is a don’t care in this mode.

Notes to the Continuous Re-circulate mode:

1) The user must insure that the beginning address is lower than the final address.

2) Changing profiles or issuing an I/O UPDATE automatically terminates the current sweep

and starts the next sweep.

3) Setting the RAM destination bit true such that the RAM output drives the phase-offset adder

is valid. While the above discussion describes a frequency sweep, a phase sweep operation

is also available.

RAM Controlled Modes of Operation Summary

The AD9953 offers 5 modes of RAM controlled operation, as shown in table 3 below.

RSCW<7:5>

(binary)

Mode

Notes

000

Direct Switch Mode

No sweeping, Profiles valid, No

Dwell invalid

001

Ramp Up

Sweeping, Profiles valid, No Dwell

valid

010

Bi-directional Ramp

Sweeping, Profile<0> is a direction

control bit, No Dwell invalid

011

Continuous Bi-

directional Ramp

Sweeping, Profiles valid, No Dwell

invalid

100

Continuous Re-circulate

Sweeping, Profiles valid, No Dwell

invalid

101,110,111

OPEN

Invalid mode – default to Direct

Switch

Table 3 RAM Modes of Operation

Internal Profile Control

The AD9953 offers a mode in which a composite frequency sweep can be built, for which the

timing control is software programmable. The “internal profile control” capability disengages the

REV. PrB 1/30/03

Page 28

Analog Devices, Inc.

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