AD6650BBC1 datasheet(17/28 Pages) AD

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Preliminary Technical Data

AD6650

REV. PrJ 02/27/2003

29 0.715 0.757 0.789 0.814 0.834 0.849

30 0.691 0.732 0.763 0.787 0.806 0.820

31 0.669 0.708 0.738 0.762 0.780 0.794

32 0.648 0.686 0.715 0.738 0.756 0.769

This table helps to calculate an upper bound on decimation,

MCIC4, given the desired filter characteristics.

INFINITE IMPULSE RESPONSE

FILTER

The IIR filter of the AD6650 is a 7th order low-pass filter

with an Infinite Impulse response. The Z-Transform and

coefficients of this filter are shown below.

xx_truncz

()

⋅









⋅









⋅

0.046227

0.278961

0.76021

1.208472













0.012895

0.254698

1.026276













RAM COEFFICIENT FILTER

The final signal processing stage is a sum-of-products

decimating filter with programmable coefficients, see Figure x.

The data memories I-RAM and Q-RAM store the 24 most

recent complex samples from the previous filter stage with 23-

bit resolution. The coefficient memory, CMEM, stores up to 48

coefficients with 20-bit resolution. On every CLK cycle, one tap

for I and one tap for Q are calculated using the same coefficients.

The RCF output consists of 16 or 24-bit data bits.

RCF Decimation Register

Each RCF channel can be used to decimate the data rate.

The decimation register is a 2 bit register and can decimate

from 1 to 4. The RCF decimation is stored in 0x18 in the

form of MRCF-1. The input rate to the RCF is fSAMPIIR.

RCF Decimation Phase Register

The AD6650 filter channel uses the value stored in this

starting from 0, the counter is loaded with this value, thus

creating an offset in the processing that should be equivalent

to the required processing delay. This data is stored in 0x19

as a 2-bit number.

RCF Filter Length

The maximum number of taps this filter can calculate, Ntaps,

is given by the equation below. The value Ntaps-1 is written

to the channel register within the AD6650 at address 0x1B.













⋅

≤

min

SAMPIIR

RCF

CLK

taps

The RCF coefficients are located in addresses 0x40 to 0x6F

and are interpreted as 20-bit 2’s complement numbers.

When writing the coefficient RAM, the lower addresses will

be multiplied by relatively older data from the IIR and the

higher coefficient addresses will be multiplied by relatively

newer data from the IIR. The coefficients need not be

symmetric and the coefficient length, Ntaps, may be even or

odd. If the coefficients are symmetric, then both sides of the

impulse response must be written into the coefficient RAM.

The RCF stores the data from the IIR into a 46x24 RAM.

23x24 is assigned to I data and 23x24 is assigned to Q data.

The RCF uses the RAM as a circular buffer, so that it is

difficult to know in which address a particular data element

is stored. To avoid start-up transients due to undefined data

RAM values, the data RAM should be cleared upon

initialization.

When the RCF is triggered to calculate a filter output, it

starts by multiplying the oldest value in the data RAM by the

first coefficient, which is pointed to by the RCF Coefficient

Offset Register (0x1A). This value is accumulated with the

products of newer data words multiplied by the subsequent

locations in the coefficient RAM until the coefficient

address RCFOFF +Ntaps-1 is reached.

Coefficient

Address

Impulse

Response

Data

h(0)

N(0) oldest

h(1)

N(1)

2 =(Ntaps - 1)

h(2)

N(2) newest

Table xx. Three-tap Filter

The RCF Coefficient Offset register can be used for two

purposes. The main purpose of this register is to allow for

multiple filters to loaded into memory and selected simply

by changing the offset as a pointer for rapid filter changes.

The other use of this register is to form part of symbol

timing adjustment. If the desired filter length is padded with

zeros on the ends, then the starting point can be adjusted to

form slight delays in when the filter is computed with

reference to the high-speed clock. This allows for vernier

adjustment of the symbol timing. Course adjustments can be

made with the RCF Decimation Phase.

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