ADAU1361BCPZ-R7 datasheet(53/81 Pages) AD

53 / 81 page

ADAU1361

Rev. C | Page 52 of 80

R7: Record Mixer Right (Mixer 2) Control 1, 16,397 (0x400D)

This register controls the gain boost of the right channel differential PGA input and the gain for the right channel auxiliary input in the

record path. The right channel record mixer is referred to as Mixer 2.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

RDBOOST[1:0]

MX2AUXG[2:0]

Table 34. Record Mixer Right (Mixer 2) Control 1 Register

Bits

Bit Name

Description

[4:3]

RDBOOST[1:0]

Right channel differential PGA input gain boost, input to Mixer 2. The right differential input uses the RINP

(positive signal) and RINN (negative signal) pins.

Setting

Gain Boost

Mute (default)

0 dB

20 dB

Reserved

[2:0]

MX2AUXG[2:0]

Right single-ended auxiliary input gain from the RAUX pin in the record path, input to Mixer 2.

Setting

Auxiliary Input Gain

000

Mute (default)

001

−12 dB

010

−9 dB

011

−6 dB

R8: Left Differential Input Volume Control, 16,398 (0x400E)

This register enables the differential path and sets the volume control for the left differential PGA input.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LDVOL[5:0]

LDMUTE

LDEN

Table 35. Left Differential Input Volume Control Register

100

−3 dB

101

0 dB

110

3 dB

111

6 dB

Bits

Bit Name

Description

[7:2]

LDVOL[5:0]

Left channel differential PGA input volume control. The left differential input uses the LINP (positive signal) and

LINN (negative signal) pins. Each step corresponds to a 0.75 dB increase in gain. See Table 71 for a complete list

of the volume settings.

Setting

Volume

000000

−12 dB (default)

000001

−11.25 dB

…

010000

0 dB

…

111110

34.5 dB

111111

35.25 dB

LDMUTE

Left differential input mute control.

0 = mute (default).

1 = unmute.

LDEN

Left differential PGA enable. When enabled, the LINP and LINN pins are used as a full differential pair. When

disabled, these two pins are configured as two single-ended inputs with the signals routed around the PGA.

0 = disabled (default).

1 = enabled.

ADAU1361BCPZ-R7 数据表(PDF) 53 Page - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 53 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表下载

链接网址

ADAU1361BCPZ-R7 数据表(PDF) 53 Page - Analog Devices

ADAU1361BCPZ-R7 数据表(HTML) 53 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表 下载

链接网址

数据表下载