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数据搜索系统，热门电子元器件搜索 |
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ST92F120 数据表(PDF) 63 Page - STMicroelectronics |
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ST92F120 数据表(HTML) 63 Page - STMicroelectronics |
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63 / 324 page  63/324 ST92F120 - REGISTER AND MEMORY MAP 23 JBLPD R240 STATUS Status Register 40 259 R241 TXDATA Transmit Data Register xx 260 R242 RXDATA Receive Data Register xx 261 R243 TXOP Transmit Opcode Register 00 261 R244 CLKSEL System Frequency Selection Register 00 266 R245 CONTROL Control Register 40 266 R246 PADDR Physiscal Address Register xx 267 R247 ERROR Error Register 00 268 R248 IVR Interrupt Vector Register xx 270 R249 PRLR Priority Level Register 10 270 R250 IMR Interrupt Mask Register 00 270 R251 OPTIONS Options and Register Group Selection 00 272 R252 CREG0 Current Register 0 xx 274 R253 CREG1 Current Register 1 xx 274 R254 CREG2 Current Register 2 xx 274 R255 CREG3 Current Register 4 xx 274 24 SCI0 R240 RDCPR0 Receiver DMA Transaction Counter Pointer xx 194 R241 RDAPR0 Receiver DMA Source Address Pointer xx 194 R242 TDCPR0 Transmitter DMA Transaction Counter Pointer xx 194 R243 TDAPR0 Transmitter DMA Destination Address Pointer xx 194 R244 S_IVR0 Interrupt Vector Register xx 196 R245 ACR0 Address/Data Compare Register xx 196 R246 IMR0 Interrupt Mask Register x0 196 R247 S_ISR0 Interrupt Status Register xx 196 R248 RXBR0 Receive Buffer Register xx 198 R248 TXBR0 Transmitter Buffer Register xx 198 R249 IDPR0 Interrupt/DMA Priority Register xx 199 R250 CHCR0 Character Configuration Register xx 200 R251 CCR0 Clock Configuration Register 00 201 R252 BRGHR0 Baud Rate Generator High Reg. xx 202 R253 BRGLR0 Baud Rate Generator Low Register xx 202 R254 SICR0 Synchronous Input Control 03 202 R255 SOCR0 Synchronous Output Control 01 203 Page (Dec) Block Reg. No. Register Name Description Reset Value Hex. Doc. Page 9 |
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