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ST92F120 数据表(PDF) 64 Page - STMicroelectronics |
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ST92F120 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 324 page  64/324 ST92F120 - REGISTER AND MEMORY MAP 25 SCI1 R240 RDCPR1 Receiver DMA Transaction Counter Pointer xx 194 R241 RDAPR1 Receiver DMA Source Address Pointer xx 194 R242 TDCPR1 Transmitter DMA Transaction Counter Pointer xx 194 R243 TDAPR1 Transmitter DMA Destination Address Pointer xx 194 R244 S_IVR1 Interrupt Vector Register xx 196 R245 ACR1 Address/Data Compare Register xx 196 R246 IMR1 Interrupt Mask Register x0 196 R247 S_ISR1 Interrupt Status Register xx 196 R248 RXBR1 Receive Buffer Register xx 198 R248 TXBR1 Transmitter Buffer Register xx 198 R249 IDPR1 Interrupt/DMA Priority Register xx 199 R250 CHCR1 Character Configuration Register xx 200 R251 CCR1 Clock Configuration Register 00 201 R252 BRGHR1 Baud Rate Generator High Reg. xx 202 R253 BRGLR1 Baud Rate Generator Low Register xx 202 R254 SICR1 Synchronous Input Control 03 202 R255 SOCR1 Synchronous Output Control 01 203 28 EFT0 R240 IC1HR0 Input Capture 1 High Register xx 147 R241 IC1LR0 Input Capture 1 Low Register xx 147 R242 IC2HR0 Input Capture 2 High Register xx 147 R243 IC2LR0 Input Capture 2 Low Register xx 147 R244 CHR0 Counter High Register FF 148 R245 CLR0 Counter Low Register FC 148 R246 ACHR0 Alternate Counter High Register FF 148 R247 ACLR0 Alternate Counter Low Register FC 148 R248 OC1HR0 Output Compare 1 High Register 80 149 R249 OC1LR0 Output Compare 1 Low Register 00 149 R250 OC2HR0 Output Compare 2 High Register 80 149 R251 OC2LR0 Output Compare 2 Low Register 00 149 R252 CR1_0 Control Register 1 00 151 R253 CR2_0 Control Register 2 00 151 R254 SR0 Status Register 00 151 R255 CR3_0 Control Register 3 00 151 Page (Dec) Block Reg. No. Register Name Description Reset Value Hex. Doc. Page 9 |
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