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WM8768EDS/R 数据表(PDF) 17 Page - Wolfson Microelectronics plc |
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WM8768EDS/R 数据表(HTML) 17 Page - Wolfson Microelectronics plc |
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17 / 38 page ![]() Production Data WM8768 w PD Rev 4.1 March 2005 17 AUDIO INTERFACE FORMATS Audio data is applied to the internal DAC filters via the Digital Audio Interface. 5 popular interface formats are supported: • Left Justified mode • Right Justified mode • I 2S mode • DSP mode A • DSP mode B All 5 formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the exception of 32 bit right justified mode, which is not supported. In left justified, right justified and I 2S modes, the digital audio interface receives DAC data on the DIN1/2/3/4 inputs. Audio data for each stereo channel is time multiplexed with LRCLK indicating whether the left or right channel is present. LRCLK is also used as a timing reference to indicate the beginning or end of the data words. In left justified, right justified and I 2S modes, the minimum number of BCLKs per LRCLK period is 2 times the selected word length. LRCLK must be high for a minimum of word length BCLKs and low for a minimum of word length BCLKs. Any mark to space ratio on LRCLK is acceptable provided the above requirements are met. In DSP modes A or B, all 8 DAC channels are time multiplexed onto DIN1. LRCLK is used as a frame sync signal to identify the MSB of the first word. The minimum number of BCLKs per LRCLK period is 8 times the selected word length. Any mark to space ratio is acceptable on LRCLK provided the rising edge is correctly positioned. LEFT JUSTIFIED MODE In left justified mode, the MSB of DIN1/2/3/4 is sampled by the WM8768 on the first rising edge of BCLK following a LRCLK transition. LRCLK is high during the left samples and low during the right samples (Figure 13). Figure 13 Left Justified Mode Timing Diagram LEFT CHANNEL RIGHT CHANNEL LRCIN BCKIN DIN1/2/3/4 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB |
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