SSM2518CPZ-R7 datasheet(30/48 Pages) AD

30 / 48 page

SSM2518

Datasheet

Rev. B | Page 30 of 48

CHANNEL MAPPING CONTROL REGISTER

Address: 0x04, Reset: 0x10, Name: Channel_Mapping_Control

Table 17. Bit Descriptions for Channel_Mapping_Control

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

CH_SEL_R

Right Channel Select. Channel 0 valid when running in mono (PCM)

mode.

0x1

Channel 0 to Channel 1 valid when running in stereo and 2-slot TDM

modes.

Channel 0 to Channel 3 valid when running in 4-slot TDM mode.

Channel 0 to Channel 7 valid when running in 8-slot TDM mode.

Channel 0 to Channel 15 valid when running in 16-slot TDM mode.

0000

Channel 0

0001

Channel 1

0010

Channel 2

0011

Channel 3

0100

Channel 4

0101

Channel 5

0110

Channel 6

0111

Channel 7

1000

Channel 8

1001

Channel 9

1010

Channel 10

1011

Channel 11

1100

Channel 12

1101

Channel 13

1110

Channel 14

1111

Channel 15

[3:0]

CH_SEL_L

Left Channel Select. Channel 0 valid when running in mono (PCM) mode.

0x0

Channel 0 to Channel 1 valid when running in stereo and 2-slot TDM

modes.

Channel 0 to Channel 3 valid when running in 4-slot TDM mode.

Channel 0 to Channel 7 valid when running in 8-slot TDM mode.

Channel 0 to Channel 15 valid when running in 16-slot TDM mode.

0000

Channel 0

0001

Channel 1

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