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SSM2518CPZ-R7 数据表(PDF) 20 Page - Analog Devices

部件名 SSM2518CPZ-R7
功能描述  Digital Input Stereo, 2 W, Class-D Audio Power Amplifier
PDF  48 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM2518CPZ-R7 数据表(HTML) 20 Page - Analog Devices

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SSM2518
Datasheet
Rev. B | Page 20 of 48
DIGITAL AUDIO FORMATS
STEREO MODE
SAI = 0
SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)
BCLK
LEFT CHANNEL
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
ANY# BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
RIGHT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
8 TO 32 BCLKs
LEFT CHANNEL
RIGHT CHANNEL
LRCLK
SDATA I2S
SDATA LJ
SDATA RJ
Figure 26. Stereo Modes: I2S, Left Justified, and Right Justified
TDM, 50% DUTY CYCLE MODE
SAI = 1 (2 slots), 2 (4 slots), 3 (8 slots), 4 (16 slots)
SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)
BCLK_EDGE = 0
LRCLK_MODE = 0
SLOT_WIDTH = 0 (32 BCLKs), 1 (24 BCLKs), 2 (16 BCLKs)
32/24/16 BCLKs
32/24/16 BCLKs
32/24/16 BCLKs
CHANNEL 1
CHANNEL 1
CHANNEL 2
CHANNEL 2
CHANNEL 2
CHANNEL N
CHANNEL N
CHANNEL N
CHANNEL 1
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
24 OR 16 BCLKs
24 OR 16 BCLKs
24 OR 16 BCLKs
BCLK
LRCLK
SDATA I2S
SDATA LJ
SDATA RJ
Figure 27. TDM Modes with 50% Duty Cycle LRCLK
TDM, PULSE MODE
SAI = 1 (2 slots), 2 (4 slots), 3 (8 slots), 4 (16 slots)
SDATA_FMT = 0 (I2S), 1 (LJ), 2 (RJ 24-bit), 3 (RJ 16-bit)
BCLK_EDGE = 0
LRCLK_MODE = 1
SLOT_WIDTH = 0 (32 BCLKs), 1 (24 BCLKs), 2 (16 BCLKs)
CHANNEL 2
CHANNEL N
CHANNEL 1
32/24/16 BCLKs
32/24/16 BCLKs
32/24/16 BCLKs
CHANNEL 1
CHANNEL 1
CHANNEL 2
CHANNEL 2
CHANNEL N
CHANNEL N
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
8 TO 32 BCLKs
24 OR 16 BCLKs
24 OR 16 BCLKs
24 OR 16 BCLKs
BCLK
LRCLK
SDATA I2S
SDATA LJ
SDATA RJ
Figure 28. TDM Modes with Pulse Mode LRCLK



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