© 2015 Semiconductor Components Industries, LLC. - FUSB302

• Rev. 2

19

www.onsemi.com

Register Definitions(9)(10)

Address

Register Name

Type

Rst Val

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x01

Device ID

R

8x

Version ID[3:0]

Revision ID[3:0]

0x02

Switches0

R/W

03

PU_EN2

PU_EN1

VCONN _CC2

VCONN _CC1

MEAS_CC2

MEAS_CC1

PDWN2

PDWN1

0x03

Switches1

R/W

20

POWERROLE

SPECREV1

SPECREV0

DATAROLE

AUTO_CRC

TXCC2

TXCC1

0x04

Measure

R/W

31

MEAS_VBUS

MDAC5

MDAC4

MDAC3

MDAC2

MDAC1

MDAC0

0x05

Slice

R/W

60

SDAC_HYS1

SDAC_HYS2

SDAC5

SDAC4

SDAC3

SDAC2

SDAC1

SDAC0

0x06

Control0

R/W/C

24

TX_FLUSH

INT_MASK

HOST_CUR1

HOST_CUR0

AUTO_PRE

TX_START

0x07

Control1

R/W/C

00

ENSOP2DB

ENSOP1DB

BIST_MODE2

RX_FLUSH

ENSOP2

ENSOP1

0x08

Control2

R/W

02

TOG_SAVE_PW

R2

TOG_SAVE_P

WR1

TOG_RD_ONLY

WAKE_EN

MODE[1:0]

TOGGLE

0x09

Control3

R/W

06

SEND_HARD_R

ESET

AUTO_HARDR

ESET

AUTO_SOFTRES

ET

N_RETRIES[1:0]

AUTO_RETRY

0x0A

Mask1

R/W

00

M_VBUSOK

M_ACTIVITY

M_COMP_CHNG

M_CRC_CHK

M_ALERT

M_WAKE

M_COLLISION

M_BC_LVL

0x0B

Power

R/W

01

PWR3

PWR2

PWR1

PWR0

0x0C

Reset

W/C

00

PD_RESET

SW_RES

0x0D

OCPreg

R/W

0F

OCP_RANGE

OCP_CUR2

OCP_CUR1

OCP_CUR0

0x0E

Maska

R/W

00

M_OCP_TEMP

M_TOGDONE

M_SOFTFAIL

M_RETRYFAIL

M_HARDSENT

M_TXSENT

M_SOFTRST

M_HARDRST

0x0F

Maskb

R/W

00

M_GCRCSENT

0x10

Undocumented

Control4

R/W

00

TOG_USRC_EX

IT

0x3C

Status0a

R

00

SOFTFAIL

RETRYFAIL

POWER3

POWER2

SOFTRST

HARDRST

0x3D

Status1a

R

00

TOGSS3

TOGSS2

TOGSS1

RXSOP2DB

RXSOP1DB

RXSOP

0x3E

Interrupta

R/C

00

I_OCP_TEMP

I_TOGDONE

I_SOFTFAIL

I_RETRYFAIL

I_HARDSENT

I_TXSENT

I_SOFTRST

I_HARDRST

0x3F

Interruptb

R/C

00

I_GCRCSENT

0x40

Status0

R

00

VBUSOK

ACTIVITY

COMP

CRC_CHK

ALERT

WAKE

BC_LVL1

BC_LVL0

0x41

Status1

R

28

RXSOP2

RXSOP1

RX_EMPTY

RX_FULL

TX_EMPTY

TX_FULL

OVRTEMP

OCP

0x42

Interrupt

R/C

00

I_VBUSOK

I_ACTIVITY

I_COMP_CHNG

I_CRC_CHK

I_ALERT

I_WAKE

I_COLLISION

I_BC_LVL

0x43

FIFOs

R/W(11)

00

Write to TX FIFO or read from RX FIFO repeatedly without address auto increment

Type C Bits

USB PD Bits

General Bits

Notes:

9. Do not use registers that are blank.

10. Values read from undefined register bits are not defined and invalid. Do not write to undefined registers.

11. FIFO register is serially read/written without auto address increment.