FUSB302MPX. datasheet(26/35 Pages) ONSEMI

26 / 35 page

www.fairchildsemi.com

FUSB302

• Rev. 2

www.onsemi.com

Table 21. Status0a

Address: 3Ch

Reset Value: 0x0000_0000

Type: Read

Bit #

Name

R/W/C

Size (Bits)

Description

7:6

Reserved

N/A

Do Not Use

SOFTFAIL

1: All soft reset packets with retries have failed to get a

GoodCRC acknowledge. This status is cleared when a

START_TX, TXON or SEND_HARD_RESET is executed.

RETRYFAIL

1: All packet retries have failed to get a GoodCRC

acknowledge. This status is cleared when a START_TX,

TXON or SEND_HARD_RESET is executed.

3:2

POWER3:POWER2

Internal power state when logic internals needs to control the

power state. POWER3 corresponds to PWR3 bit and

POWER2 corresponds to PWR2 bit. The power state is the

higher of both PWR[3:0] and {POWER3, POWER2, PWR[1:0]}

so that if one is 03 and the other is F then the internal power

state is F.

SOFTRST

1: One of the packets received was a soft reset packet

HARDRST

1: Hard Reset PD ordered set has been received

Table 22. Status1a

Address: 3Dh

Reset Value: 0x0000_0000

Type: Read

Bit #

Name

R/W/C

Size (Bits)

Description

7:6

Reserved

N/A

Do Not Use

5:3

TOGSS3: TOGSS2:

TOGSS1

000: Toggle logic running (processor has previously written

TOGGLE=1)

001: Toggle functionality has settled to SRCon CC1

(STOP_SRC1 state)

010: Toggle functionality has settled to SRCon CC2

(STOP_SRC2 state)

101: Toggle functionality has settled to SNKon CC1

(STOP_SNK1 state)

110: Toggle functionality has settled to SNKon CC2

(STOP_SNK2 state)

111: Toggle functionality has detected AudioAccessory with

vRa on both CC1 and CC2 (settles to STOP_SRC1 state)

Otherwise: Not defined (do not interpret)

RXSOP2DB

1: Indicates the last packet placed in the RxFIFO is type

SOP”_DEBUG (SOP double prime debug).

RXSOP1DB

1: Indicates the last packet placed in the RxFIFO is type

SOP’_DEBUG (SOP prime debug).

RXSOP

1: Indicates the last packet placed in the RxFIFO is type SOP.

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