AM29SL400CB100REF datasheet(17/44 Pages) SPANSION

17 / 44 page

March 3, 2005

Ad vance

Inform ati o n

vice ignores reset commands until the operation is

complete.

The reset command may be written between the se-

quence cycles in a program command sequence be-

fore programming begins. This resets the device to

reading array data (also applies to programming in

Erase Suspend mode). Once programming begins,

however, the device ignores reset commands until

the operation is complete.

The reset command may be written between the se-

quence cycles in an autoselect command sequence.

Once in the autoselect mode, the reset command

must be written to return to reading array data (also

applies to autoselect during Erase Suspend).

If DQ5 goes high during a program or erase opera-

tion, writing the reset command returns the device

to reading array data (also applies during Erase Sus-

pend).

Autoselect Command Sequence

The autoselect command sequence allows the host

system to access the manufacturer and devices

codes, and determine whether or not a sector is pro-

tected. Table 5 on page 18 shows the address and

data requirements. This method is an alternative to

that shown in Table 4 on page 12, which is intended

for PROM programmers and requires VID on address

bit A9.

The autoselect command sequence is initiated by

writing two unlock cycles, followed by the autoselect

command. The device then enters the autoselect

mode, and the system may read at any address any

number of times, without initiating another com-

mand sequence. A read cycle at address XX00h re-

trieves the manufacturer code. A read cycle at

address 01h in word mode (or 02h in byte mode) re-

turns the device code. A read cycle containing a sec-

tor address (SA) and the address 02h in word mode

(or 04h in byte mode) returns 01h if that sector is

protected, or 00h if it is unprotected. Refer to Table 2

on page 11 and Table 3 on page 11 for valid sector

addresses.

The system must write the reset command to exit

the autoselect mode and return to reading array

data.

Word/Byte Program Command Sequence

The system may program the device by word or

byte, depending on the state of the BYTE# pin. Pro-

gramming is a four-bus-cycle operation. The pro-

gram command sequence is initiated by writing two

unlock write cycles, followed by the program set-up

command. The program address and data are writ-

ten next, which in turn initiate the Embedded Pro-

gram algorithm. The system is not required to

provide further controls or timings. The device auto-

matically generates the program pulses and verifies

the programmed cell margin. Table 5 on page 18

shows the address and data requirements for the

byte program command sequence.

When the Embedded Program algorithm is complete,

the device then returns to reading array data and

addresses are no longer latched. The system can de-

termine the status of the program operation by using

DQ7, DQ6, or RY/BY#. See Write Operation Status‚

on page 18 for information on these status bits.

Any commands written to the device during the Em-

bedded Program Algorithm are ignored. Note that a

hardware reset immediately terminates the pro-

gramming operation. The Byte Program command

sequence should be reinitiated once the device has

reset to reading array data, to ensure data integrity.

Programming is allowed in any sequence and across

sector boundaries. A bit cannot be programmed

from a 0 back to a 1. Attempting to do so may halt

the operation and set DQ5 to 1, or cause the Data#

Polling algorithm to indicate the operation was suc-

cessful. However, a succeeding read will show that

the data is still 0. Only erase operations can convert

a 0 to a 1.

Unlock Bypass Command Sequence

The unlock bypass feature allows the system to pro-

gram bytes or words to the device faster than using

the standard program command sequence. The un-

lock bypass command sequence is initiated by first

writing two unlock cycles. This is followed by a third

write cycle containing the unlock bypass command,

20h. The device then enters the unlock bypass

mode. A two-cycle unlock bypass program command

sequence is all that is required to program in this

mode. The first cycle in this sequence contains the

unlock bypass program command, A0h; the second

cycle contains the program address and data. Addi-

tional data is programmed in the same manner. This

mode dispenses with the initial two unlock cycles re-

quired in the standard program command sequence,

resulting in faster total programming time. Table 5

on page 18 shows the requirements for the com-

mand sequence.

During the unlock bypass mode, only the Unlock By-

pass Program and Unlock Bypass Reset commands

are valid. To exit the unlock bypass mode, the sys-

tem must issue the two-cycle unlock bypass reset

command sequence. The first cycle must contain the

data 90h; the second cycle the data 00h. Addresses

are don’t cares. The device then returns to reading

array data.

Figure 3‚ on page 16 illustrates the algorithm for the

program operation. See Erase/Program Operations‚

on page 30 for parameters, and Figure 17‚ on

page 31 for timing diagrams.

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