AM29SL400CB100REF datasheet(21/44 Pages) SPANSION

21 / 44 page

March 3, 2005

Ad vance

Inform ati o n

subsections describe the functions of these bits.

DQ7, RY/BY#, and DQ6 each offer a method for de-

termining whether a program or erase operation is

complete or in progress. These three bits are dis-

cussed first.

DQ7: Data# Polling

The Data# Polling bit, DQ7, indicates to the host sys-

tem whether an Embedded Algorithm is in progress

or completed, or whether the device is in Erase Sus-

pend. Data# Polling is valid after the rising edge of

the final WE# pulse in the program or erase com-

mand sequence.

During the Embedded Program algorithm, the device

outputs on DQ7 the complement of the datum pro-

grammed to DQ7. This DQ7 status also applies to

programming during Erase Suspend. When the Em-

bedded Program algorithm is complete, the device

outputs the datum programmed to DQ7. The system

must provide the program address to read valid sta-

tus information on DQ7. If a program address falls

within a protected sector, Data# Polling on DQ7 is

active for approximately 1 µs, then the device re-

turns to reading array data.

During the Embedded Erase algorithm, Data# Polling

produces a 0 on DQ7. When the Embedded Erase al-

gorithm is complete, or if the device enters the Erase

Suspend mode, Data# Polling produces a 1 on DQ7.

This is analogous to the complement/true datum

output described for the Embedded Program algo-

rithm: the erase function changes all the bits in a

sector to 1; prior to this, the device outputs the

complement, or 0. The system must provide an ad-

dress within any of the sectors selected for erasure

to read valid status information on DQ7.

After an erase command sequence is written, if all

sectors selected for erasing are protected, Data#

Polling on DQ7 is active for approximately 100 µs,

then the device returns to reading array data. If not

all selected sectors are protected, the Embedded

Erase algorithm erases the unprotected sectors, and

ignores the selected sectors that are protected.

When the system detects DQ7 has changed from the

complement to true data, it can read valid data at

DQ7–DQ0 on the following read cycles. This is be-

cause DQ7 may change asynchronously with

DQ0–DQ6 while Output Enable (OE#) is asserted

low. Figure 19‚ on page 33 Data# Polling Timings

(During Embedded Algorithms), illustrates this.

Table 6 on page 22 shows the outputs for Data#

Polling on DQ7. Figure 5 shows the Data# Polling al-

gorithm.

RY/BY#: Ready/Busy#

The RY/BY# is a dedicated, open-drain output pin

that indicates whether an Embedded Algorithm is in

progress or complete. The RY/BY# status is valid

after the rising edge of the final WE# pulse in the

command sequence. Since RY/BY# is an open-drain

output, several RY/BY# pins can be tied together in

parallel with a pull-up resistor to VCC.

If the output is low (Busy), the device is actively

erasing or programming. (This includes program-

DQ7 = Data?

Yes

DQ5 = 1?

Yes

FAIL

PASS

Read DQ7–DQ0

Addr = VA

Read DQ7–DQ0

Addr = VA

DQ7 = Data?

START

Notes:

1. VA = Valid address for programming. During a sector

erase operation, a valid address is an address within any

sector selected for erasure. During chip erase, a valid

address is any non-protected sector address.

2. DQ7 should be rechecked even if DQ5 = 1 because DQ7

may change simultaneously with DQ5.

Figure 5. Data# Polling Algorithm

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