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TUSB5052 数据表(PDF) 64 Page - Texas Instruments

部件名 TUSB5052
功能描述  USB to 2-Serial 1-Parallel Controller With Configurable Optional Hub
PDF  84 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TUSB5052 数据表(HTML) 64 Page - Texas Instruments

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8–4
8.1.5
PPCTL: P-Port Control Register
This register is used to control the P-port output signals.
RSV
RSV
RSV
RSV
SLIN
INIT
AFD
STB
7
6
5
4
32
10
R/O
R/O
R/O
R/O
R/W
R/W
R/W
R/W
BIT
NAME
RESET
FUNCTION
0
STB
0
This bit affects the inverse of STB output pin.
STB = 0
STB output is set to 1 (inactive)
STB = 1
STB output is set to 0 (active)
1
AFD
0
This bit affects the inverse of AFD output pin.
AFD = 0
AFD output is set to 1 (inactive)
AFD = 1
AFD output is set to 0 (active)
2
INIT
0
This bit affects the inverse of INIT* output pin.
INIT = 0
INIT output is set to 1 (inactive)
INIT = 1
INIT output is set to 0 (active)
3
SLIN
0
This bit affects the inverse of SLIN * output pin.
SLIN = 0
SLIN output is set to 1 (inactive)
SLIN = 1
SLIN output is set to 0 (active)
7–4
RSV
0
Reserved = 0
Table 8–4. PP Output-Pins Activation Source
PPCTR
SPP
EPP
ECP
OUTPUT PINS
PPCTR
REGISTER
IN
OUT
IN
OUT
IN
OUT
OUTPUT PINS
STB
H
H
H
H
H
H
STB
AFD
H
H
H
H
H
H
AFD
INIT
F
F
F
F
HF†
HF†
INIT
SLIN
F
F
F
H
F
F
SLIN
† INIT is controlled by the DIR bit in the PPMCR register.
H = Output pin is driven by hardware
F = Output pin is driven by firmware (the MCU can toggle this bit).
8.1.6
PPADR: EPP/ECP Address Register
This register is used in the EPP/ECP modes of operation only. In these modes, it is used as the command/address
register. Writing to this register generates the EPP/ECP address-protocol signals automatically.
RSV
A6
A5
A4
A3
A2
A1
A0
7
6
5
4
32
10
R/O
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
NAME
RESET
FUNCTION
6–0
A[6:0]
00h
Channel address or run-length count-value (0–127)
7
RSV
0
Reserved = 0



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