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Table 10 - Address Pointer High Register
BIT
BIT NAME
SYMBOL
DESCRIPTION
7
Read Data
RDDATA
This bit tells the ARCNET core whether the following
access will be a read or write. A logic "1" prepares the
device for a read, a logic "0" prepares it for a write.
6
Auto Increment
AUTOINC
This bit controls whether the address pointer will
increment automatically. A logic "1" on this bit allows
automatic increment of the pointer after each access,
while a logic "0" disables this function. Please refer to
the Sequential Access Memory section for further detail.
5-2
(reserved)
These bits are undefined.
1-0
Address 9-8
A9-A8
These bits hold the upper two address bits which provide
addresses to RAM.
Table 11 - Address Pointer Low Register
BIT
BIT NAME
SYMBOL
DESCRIPTION
7-0
Address 7-0
A7-A0
These bits hold the lower 8 address bits which provide
the addresses to RAM.
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