78 / 82 page
78
FIGURE 28 – BACKPLANE MODE TRANSMIT OR RECEIVE TIMING
(These signals are to and from the differential driver or the cable)
nPULSE1
t2
t3
RXIN
t10
t11
nPULSE2
t5
t6
(Internal Clk)
t4
t1
t7
TXEN
t9
t8
LAST BIT
(400 nS BIT TIME)
* t2,t7,t10 = 4 x (crystal period) for clock frequencies other than 20 MHz.
* t3,t11 = 8 x (crystal period) for clock frequencies other than 20 MHz.
This period applies to data of two consecutive one's.
* t5,t6 = 2 x (crystal period) for clock frequencies other than 20 MHz.
** t9: For clock frequencies other than 20 MHz, t9 = 14 x (clock period) ± 50 nsec.
Note: Clock frequency for 5 Mbps is 40 MHz.
Parameter
min
typ
max
units
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
nPULSE2 High to TXEN Low
nPULSE1 Pulse Width
nPULSE1 Period
nPULSE2 Low to nPULSE1 Low
nPULSE2 High Time
nPULSE2 Low Time
nPULSE2 Period
nPULSE2 High to TXEN High
(first rising edge on nPULSE2 after Last Bit Time)
TXEN Low to First nPULSE1 Low**
RXIN Pulse Width
RXIN Period
0
0
0
650
10
200*
400*
100*
100*
200*
200*
400*
50
50
50
750
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
