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V62/13624-01XE-R 数据表(PDF) 5 Page - Texas Instruments

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部件名 V62/13624-01XE-R
功能描述  Mixed Signal Microcontroller
PDF  77 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

V62/13624-01XE-R 数据表(HTML) 5 Page - Texas Instruments

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5
MSP430F2132-EP
www.ti.com
SLAS913A – JULY 2013 – REVISED AUGUST 2013
Product Folder Links: MSP430F2132-EP
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Functional Block Diagram (continued)
Terminal Functions (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
P2.4/TA0.2/A4/VREF+/VeREF+/CA1
19
I/O
General-purpose digital I/O pin
Timer0_A3, compare: Out2 Output
ADC10 analog input A4 / positive reference
Comparator_A+ input
XIN/P2.6/CA6
3
I/O
Input terminal of crystal oscillator
General-purpose digital I/O pin
Comparator_A+ input
XOUT/P2.7/CA7
2
I/O
Output terminal of crystal oscillator
General-purpose digital I/O pin
Comparator_A+ input
P3.0/UCB0STE/UCA0CLK/A5
9
I/O
General-purpose digital I/O pin
USCI_B0 slave transmit enable/USCI_A0 clock input/output
ADC10 analog input A5
P3.1/UCB0SIMO/UCB0SDA
10
I/O
General-purpose digital I/O pin
USCI_B0 slave in/master out (SPI mode), SDA I2C data (I2C mode)
P3.2/UCB0SOMI/UCB0SCL
11
I/O
General-purpose digital I/O pin
USCI_B0 slave out/master in (SPI mode), SCL I2C clock (I2C mode)
P3.3/UCB0CLK/UCA0STE
12
I/O
General-purpose digital I/O
USCI_B0 clock input/output, USCI_A0 slave transmit enable
P3.4/UCA0TXD/UCA0SIMO
13
I/O
General-purpose digital I/O pin
USCI_A0 transmit data output in UART mode, slave data in/master out in
SPI mode
P3.5/UCA0RXD/UCA0SOMI
14
I/O
General-purpose digital I/O pin
USCI_A0 receive data input (UART mode), slave data out/master in
(SPI mode)
P3.6/TA1.0/A6
15
I/O
General-purpose digital I/O pin
Timer1_A2, capture: CCI0B input, compare: Out0 Output
ADC10 analog input A6
P3.7/TA1.1/A7
16
I/O
General-purpose digital I/O pin
Timer1_A2, capture: CCI1A input, compare: Out1 Output
ADC10 analog input A7
RST/NMI/SBWTDIO
5
I
Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
TEST/SBWTCK
29
I
Selects test mode for JTAG pins on Port 1. The device protection fuse is
connected to TEST.
P2.5/ROSC/CA5
32
I/O
General-purpose digital I/O pin
Input for external resistor defining the DCO nominal frequency
Comparator_A+ input
DVCC
30
Digital supply voltage
DVSS
1
Digital supply voltage
NC
4, 17, 20,
31
Not connected internally. Connection to VSS is recommended.
QFN Pad
Pad
QFN package pad (RHB, RTV packages). Connection to DVSS is
recommended.



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