MT7697D datasheet(13/84 Pages) ETC2

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MT7697D

Internet-of-Things Wireless Connectivity

Page 13 of 84

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They are used to keep BUCK and CLDO output voltage while MT7697D is in sleep mode to reduce

current consumption.

Once MT7697D goes into deep sleep mode, BUCK, ALDO, and CLDO can be shut down. BUCK output

voltage will be kept by SLDO-H, and CLDO output will be kept by SLDO-L.

PMU also integrated the ELDO (Efuse LDO). It provides 2.5V output voltage to the internal Efuse

macro in programming mode.

2.2.2

Chip Power Plan

The 3.3V power source is directly supplied to the switching regulator, digital I/Os, and RF-related

circuit. It is converted to 2.5V by the LDO for ADC analog circuit. It is converted to 1.6V by the buck

converter for low voltage circuits. The built-in digital LDOs and RF LDOs converts 1.6V to 1.15V for

digital, RF, and BBPLL core circuits.

2.2.3

Digital Power Domain and Power States

The digital circuit is separated into five power domains. They are TOP_AON, TOP_OFF(N9), WF_OFF,

BT_OFF, and CM4_SYS. Except TOP_AON, each power domain can be turned on and off individually.

Table 2-1. MTCMOS Power Domain

Domain

Description

Circuit Included

OFF Condition

TOP_AON

Always-on power domain,

which keeps the minimum

circuit powered to wake up

from the sleep mode upon

receiving a wake-up event.

It includes:

Chip level configuration

Sleep mode controller;

External interrupt controller;

Part of the Wi-Fi MAC that

handles the beacon filtering.

Sustain and backup memory

that stores the RAM code

and the register values that

need to be kept during sleep

mode.

N/A

TOP_OFF(N9) The power domain can be

power gated in Wi-Fi power

save mode and Bluetooth

The whole N9 subsystem, N9

peripherals, and part of the

Wi-Fi MAC circuit are

N9 is in sleep mode

and no DMA functions

are enabled.

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