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MT7697D 数据表(PDF) 43 Page - List of Unclassifed Manufacturers

部件名 MT7697D
功能描述  Internet-of-Things Wireless Connectivity
PDF  84 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

MT7697D 数据表(HTML) 43 Page - List of Unclassifed Manufacturers

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MT7697D
Internet-of-Things Wireless Connectivity
© 2016 MediaTek Inc.
Page 43 of 84
This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).
Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.
2.5.3
I2C Serial Interface
MT7697D features two I2C serial interface master controllers. The two signals of I2C channel 0 are
I2C0_CLK and I2C0_DATA.
I2C0_CLK is a clock signal that is driven by the master.
I2C0_DATA is a bi-directional data signal that can be driven by either the master or the slave.
It supports the clock rate of 50, 100, 200, and 400 KHz.
I2C channel 1 supports the same feature as channel 0.
2.5.4
Auxiliary ADC function
MT7697D features one auxiliary ADC function. The ADC function contains a 4-channel analog switch,
a single-end input asynchronous 12-bit SAR (Successive Approximation Register) ADC, and a digital
averaging function. The digital averaging function can perform on-the-fly averaging function of
1/2/4/8/16/32/64 points. The ADC features the dithering function to enhance the DNL performance.
The ADC uses an external VREF20 as a reference voltage.
MUX
Vin
Vref
0
Vin
Vref
0
Vin
Vrdac
0
Vin
Vref
CMP
AUXADC0
Vcm buf
VCM
Vrdac
CDAC
AUXADC3
Vref=1.8V
SAR
Control
Logic
CLK
(2MHz)
12
Digital
Output
VREF20
AUXADC_MUX[3:0]
Figure 2-16. Auxiliary ADC Block Diagram (Analog Part)



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