MT7697D datasheet(35/84 Pages) ETC2

35 / 84 page

MT7697D

Internet-of-Things Wireless Connectivity

Page 35 of 84

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Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

Start address

End address

Function

Power Domain

Software Clock

gating control

Description

0x7900_0000

0x7900_FFFF

VFF_CM4 access

port

CM4_OFF

0x8300_0200[3]

Virtual FIFO access

ports of CM4 DMA

0x8000_0000

0x800C_FFFF

APB0

TOP_OFF(N9)

APB bridge 0

(synchronous to N9)

0x8000_0000

0x8000_FFFF

CONFG

TOP_OFF(N9)

N9 subsystem

configuration

0x8001_0000

0x8001_FFFF

DMA

TOP_OFF(N9)

Generic DMA

engine for N9

0x8002_0000

0x8002_FFFF

TOP_CFG_OFF

TOP_OFF(N9)

power domain chip

level configuration

(GPIO, PINMUX, RF,

CLK control)

0x8003_0000

0x8003_FFFF

UART/BTIF

TOP_OFF(N9)

0x8000_0100[6]

UART or Bluetooth

host interface for

0x8005_0000

0x8005_FFFF

UART_PTA

TOP_OFF(N9)

0x8000_0100[11]

Inter-chip

communication for

PTA

0x8008_0000

0x8008_FFFF

AHB_MON

TOP_OFF(N9)

0x8000_0100[10]

AHB bus monitor

0x8009_0000

0x8009_FFFF

ACCLR

TOP_OFF(N9)

0x8000_0100[13]

Bluetooth audio

Packet Loss

Concealment

accelerator

0x800A_0000

0x800A_FFFF

UART_DSN

TOP_OFF(N9)

0x8000_0100[7]

UART for N9 debug

0x800B_0000

0x800B_FFFF

SEC

TOP_OFF(N9)

Secure boot

configuration

0x800C_0000

0x800C_FFFF

HIF

TOP_OFF(N9)

Host interface

configuration

0x8100_0000

0x810C_FFFF

APB1

TOP_OFF(N9)

APB bridge 1

(synchronous to N9)

0x8100_0000

0x8100_FFFF

BTSYS

TOP_OFF(N9)

0x8000_0100[24]

Bluetooth

subsystem

0x8102_0000

0x8102_FFFF

TOP_CFG_AON

TOP_AON

TOP_AON power

domain chip level

configuration (RGU,

PINMUX, PLL, PMU,

XTAL, CLK control)

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MT7697D 数据表(PDF) 35 Page - List of Unclassifed Manufacturers

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