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MT7697D 数据表(PDF) 77 Page - List of Unclassifed Manufacturers

部件名 MT7697D
功能描述  Internet-of-Things Wireless Connectivity
PDF  84 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

MT7697D 数据表(HTML) 77 Page - List of Unclassifed Manufacturers

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MT7697D
Internet-of-Things Wireless Connectivity
© 2016 MediaTek Inc.
Page 77 of 84
This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).
Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.
Table 5-3. Pin Multiplexing
Pin
Pin alias
APGIO/
GPIO
Name
Dir
Default
dir
Default
PU/PD
Description
Pinx_pinmux_aon_sel
Pinx_pinmux_off_sel
Address
Value
Value
5
GPIO0
AGPIO
MCU_JTCK
I
I
PD
N9 JTAG debug port
0x8102_3020[3:0]
0
0x8002_5100[3:0]
(0x8102_3020[3:0]=0)
0
ANTSEL[0]
O
RF control
-
1
UART0_RTS_CM4
O
UART0 RTS (CM4)
7
3
GPIO_TOPOFF[0]
I/O
General purpose input output
-
5
GPIO_TOPAON[0]
O
General purpose input output
8
-
PWM[0]
I/O
Pulse-width-modulated output
9
-
EINT[0]
I
External interrupt
3
-
6
GPIO1
AGPIO
MCU_JTMS
I
I
PD
N9 JTAG debug port
0x8102_3020[7:4]
0
0x8002_5100[7:4]
(0x8102_3020[7:4]=0)
0
ANTSEL[1]
O
RF control
-
1
UART0_CTS_CM4
I
UART0 CTS (CM4)
7
3
GPIO_TOPOFF[1]
I/O
General purpose input output
-
5
GPIO_TOPAON[1]
I/O
General purpose input output
8
-
PWM[1]
O
Pulse-width-modulated output
9
-
EINT[1]
I
External interrupt
3
-
7
GPIO2
AGPIO
MCU_JTDI
I
I
PD
N9 JTAG debug port
0x8102_3020[11:8]
0
0x8002_5100[11:8]
(0x8102_3020[11:8]=0)
0
ANTSEL[2]
O
RF control
-
1
MCU_AICE_TMSC
I/O
N9 debug
-
2
UART0_RX_CM4
I
UART0 RX (CM4)
7
3
SWD_CLK
O
CM4 SWD debug port
4
4
GPIO_TOPOFF[2]
I/O
General purpose input output
-
5
GPIO_TOPAON[2]
I/O
General purpose input output
8
-
PWM[23]
O
Pulse-width-modulated output
9
-
WIC[0]
I
External interrupt
3
-
8
GPIO3
AGPIO
MCU_JTRST_B
I
I
PD
N9 JTAG debug port
0x8102_3020[15:12]
0
0x8002_5100[15:12]
(0x8102_3020[15:12]=0)
0
ANTSEL[3]
O
RF control
-
1
[Reserved]
I
[Reserved]
-
2
UART0_TX_CM4
O
UART0 TX (CM4)
7
3
SWD_DIO
I/O
CM4 SWD debug port
4
4
GPIO_TOPOFF[3]
I/O
General purpose input output
-
5
GPIO_TOPAON[3]
I/O
General purpose input output
8
-
PWM[24]
O
Pulse-width-modulated output
9
-
EINT[2]
I
External interrupt
3
-
PULSE_CNT
I
Pulse counter
2
-
9
GPIO4
GPIO
MCU_DBGIN
I
I
PD
N9 JTAG debug port
0x8102_3020[19:16]
0
0x8002_5100[19:16]
(0x8102_3020[19:16]=0)
0
ANTSEL[4]
O
RF control
-
1
MCU_AICE_TCKC
I
N9 debug
-
-
SPI_DATA0_EXT *
I/O
External flash interface
7
3
GPIO_TOPOFF[4]
I/O
General purpose input output
-
5
GPIO_TOPAON[4]
I/O
General purpose input output
8
-
PWM[2]
O
Pulse-width-modulated output
9
-
EINT[3]
I
External interrupt
3
-
10
GPIO5
GPIO
[Debug flag]
O
O(Lo
w)
Debug monitor pin
0x8102_3020[23:20]
0
0x8002_5100[23:20]
(0x8102_3020[23:20]=0)
0
ANTSEL[5]
O
RF control
-
1
SPI_DATA1_EXT *
O
External flash interface
7
3
GPIO_TOPOFF[5]
I/O
I
General purpose input output
-
5
GPIO_TOPAON[5]
I/O
General purpose input output
8
-
PWM[3]
O
Pulse-width-modulated output
9
-
EINT[4]
I
External interrupt
3
-



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