ADN2525

Rev. 0 | Page 10 of 16

The equivalent circuits of the BSET, IBIAS, and IBMON pins

are shown in Figure 20, Figure 21, and Figure 22.

VCC

BSET

VCC

800

Ω

200

Ω

Figure 20. Equivalent Circuit of the BSET Pin

2

Ω

2k

Ω

100

Ω

IBIAS

VCC

VCC

Figure 21. Equivalent Circuit of the IBIAS Pin

VCC

IBMON

VCC

100

Ω

500

Ω

VCC

Figure 22. Equivalent Circuit of the IBMON Pin

The recommended configuration for BSET, IBIAS, and IBMON

is shown in Figure 23.

ADN2525

BSET

VBSET

GND

IBMON

IBIAS

TO LASER CATHODE

L

1k

Ω

IBIAS

Figure 23. Recommended Configuration for BSET, IBIAS, and IBMON Pins

The circuit used to drive the BSET voltage must be able to drive

the 1 kΩ input resistance of the BSET pin. For proper operation

of the bias current source, the voltage at the IBIAS pin must be

between the compliance voltage specifications for this pin over

supply, temperature, and bias current range. See the Specifications

table. The maximum compliance voltage is specified for only

two bias current levels (10 mA and 100 mA), but it can be

calculated for any bias current by using the following equation:

See the Applications Information section for example headroom

calculations.

The function of the inductor L is to isolate the capacitance of

the IBIAS output from the high frequency signal path. For

recommended components, see Table 5.

AUTOMATIC LASER SHUTDOWN (ALS)

The ALS pin is a digital input that enables/disables both the bias

and modulation currents, depending on the logic state applied,

as shown in Table 4.

Table 4.

ALS Logic State

IBIAS and IMOD

High

Disabled

Low

Enabled

Floating

Enabled

The ALS pin is compatible with 3.3 V CMOS and TTL logic

levels. Its equivalent circuit is shown in Figure 24.

VCC

ALS

VCC

100

Ω

50k

Ω

2k

Ω

Figure 24. Equivalent Circuit of the ALS Pin

MODULATION CURRENT

The modulation current can be controlled by applying a dc

voltage to the MSET pin. This voltage is converted into a dc

current by using a voltage-to-current converter using an

operational amplifier and a bipolar transistor as shown in

Figure 25.

50

Ω

IMOD

200

Ω

800

Ω

MSET

GND

IMODP

IMODN

ADN2525

VCC

FROM INPUT STAGE

Figure 25. Generation of Modulation Current on the ADN2525