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ADN2525ACPZ-R2 数据表(PDF) 12 Page - Analog Devices

部件名 ADN2525ACPZ-R2
功能描述  10.7 Gbps Active Back-Termination, Differential Laser Diode Driver
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADN2525ACPZ-R2 数据表(HTML) 12 Page - Analog Devices

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ADN2525
Rev. 0 | Page 12 of 16
LOAD MIS-TERMINATION
Due to its excellent S22 performance, the ADN2525 can drive
differential loads that range from 5 Ω to 50 Ω. In practice, many
TOSAs have differential resistance less than 50 Ω. In this case,
with 50 Ω differential transmission lines connecting the
ADN2525 to the load, the load end of the transmission lines are
mis-terminated. This mis-termination leads to signal reflections
back to the driver. The excellent back-termination in the
ADN2525 absorbs these reflections, preventing their reflection
back to the load. This enables excellent optical eye quality to be
achieved, even when the load end of the transmission lines is
significantly mis-terminated. The connection between the load
and the ADN2525 must be made with 50 Ω differential (25 Ω
single-ended) transmission lines so that the driver end of the
transmission lines is properly terminated.
POWER CONSUMPTION
The power dissipated by the ADN2525 is given by
IBIAS
V
I
V
VCC
P
IBIAS
SUPPLY
MSET
×
+
+
×
=
5
.
13
where:
VCC is the power supply voltage.
IBIAS is the bias current generated by the ADN2525.
VMSET is the voltage applied to the MSET pin.
ISUPPLY is the sum of the current that flows into the VCC,
IMODP, and IMODN pins of the ADN2525 when
IBIAS = IMOD = 0 expressed in amps (see Table 1).
VIBIAS is the average voltage on the IBIAS pin.
Considering VBSET/IBIAS = 10 as the conversion factor from
VBSET to IBIAS, the dissipated power becomes
IBIAS
BSET
SUPPLY
MSET
V
V
I
V
VCC
P
×
+
+
×
=
10
5
.
13
To ensure long-term reliable operation, the junction tempera-
ture of the ADN2525 must not exceed 125°C, as specified in
Table 2. For improved heat dissipation, the module’s case can be
used as heat sink as shown in Figure 31. A compact optical
module is a complex thermal environment, and calculations of
device junction temperature using the package θJA (junction-to-
ambient thermal resistance) do not yield accurate results.
TTOP
TJ
TPAD
DIE
PACKAGE
THERMAL COMPOUND
MODULE CASE
PCB
VIAS
COPPER PLANE
THERMO-COUPLE
Figure 31. Typical Optical Module Structure
The following procedure can be used to estimate the IC
junction temperature:
TTOP = Temperature at top of package in °C.
TPAD = Temperature at package exposed paddle in °C.
TJ = IC junction temperature in °C.
P = Power dissipation in W.
θJ-TOP = Thermal resistance from IC junction to package top.
θJ-PAD = Thermal resistance from IC junction to package exposed
pad.
P
θ
J-TOP
TPAD
TTOP
TTOP
θ
J-PAD
TPAD
Figure 32. Electrical Model for Thermal Calculations
TTOP and TPAD can be determined by measuring the temperature
at points inside the module as shown in Figure 31. The thermo-
couples should be positioned to obtain an accurate measurement
of the package top and paddle temperatures. Using the model
shown in Figure 32, the junction temperature can be calculated
using the following formula:
(
)
TOP
J
PAD
J
TOP
J
PAD
PAD
J
TOP
TOP
J
PAD
J
J
T
T
P
T
θ
+
θ
θ
×
+
θ
×
+
θ
×
θ
×
=
where θJ-TOP and θJ-PAD are given in Table 2 and P is the power
dissipated by the ADN2525.



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