| 数据搜索系统,热门电子元器件搜索 |
|
56F8167 数据表(PDF) 143 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
56F8167 数据表(HTML) 143 Page - Freescale Semiconductor, Inc |
|
143 / 184 page ![]() DC Electrical Characteristics 56F8367 Technical Data, Rev. 7.0 Freescale Semiconductor 143 Preliminary Table 10-6 Power-On Reset Low Voltage Parameters Characteristic Symbol Min Typ Max Units POR Trip Point POR 1.75 1.8 1.9 V LVI, 2.5 volt Supply, trip point1 1. When VDD_CORE drops below VEI2.5, an interrupt is generated. VEI2.5 —2.14— V LVI, 3.3 volt supply, trip point2 2. When VDD_CORE drops below VEI3.3, an interrupt is generated. VEI3.3 —2.7 — V Bias Current I bias —110 130 µA Table 10-7 Current Consumption per Power Supply Pin (Typical) On-Chip Regulator Enabled (OCR_DIS = Low) Mode IDD_IO 1 1. No Output Switching 2. Includes Processor Core current supplied by internal voltage regulator IDD_ADC IDD_OSC_PLL Test Conditions RUN1_MAC 155mA 50mA 2.5mA • 60MHz Device Clock • All peripheral clocks are enabled • All peripherals running • Continuous MAC instructions with fetches from Data RAM • ADC powered on and clocked Wait3 91mA 70 µA2.5mA • 60MHz Device Clock • All peripheral clocks are enabled • ADC powered off Stop1 6mA 0 µA165µA • 8MHz Device Clock • All peripheral clocks are off • ADC powered off • PLL powered off Stop2 5.1mA 0 µA155µA • External Clock is off • All peripheral clocks are off • ADC powered off • PLL powered off |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |