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56F8167 数据表(PDF) 146 Page - Freescale Semiconductor, Inc |
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56F8167 数据表(HTML) 146 Page - Freescale Semiconductor, Inc |
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146 / 184 page ![]() 56F8367 Technical Data, Rev. 7.0 146 Freescale Semiconductor Preliminary 10.3 AC Electrical Characteristics Tests are conducted using the input levels specified in Table 10-5. Unless otherwise specified, propagation delays are measured from the 50% to the 50% point, and rise and fall times are measured between the 10% and 90% points, as shown in Figure 10-1. Figure 10-1 Input Signal Measurement References Figure 10-2 shows the definitions of the following signal states: • Active state, when a bus or signal is driven, and enters a low impedance state • Tri-stated, when a bus or signal is placed in a high impedance state • Data Valid state, when a signal level has reached VOL or VOH • Data Invalid state, when a signal level is in transition between VOL and VOH Figure 10-2 Signal States 10.4 Flash Memory Characteristics Table 10-12 Flash Timing Parameters Characteristic Symbol Min Typ Max Unit Program time1 1. There is additional overhead which is part of the programming sequence. See the 56F8300 Peripheral User Manual for details. Program time is per 16-bit word in Flash memory. Two words at a time can be programmed within the Pro- gram Flash Module, as it contains two interleaved memories. Tprog 20 — — µs Erase time2 2. Specifies page erase time. There are 512 bytes per page in the Data and Boot Flash memories. The Program Flash Module uses two interleaved Flash memories, increasing the effective page size to 1024 bytes. Terase 20 — — ms Mass erase time Tme 100 — — ms VIH VIL Fall Time Input Signal Note: The midpoint is VIL + (VIH – VIL)/2. Midpoint1 Low High 90% 50% 10% Rise Time Data Invalid State Data1 Data2 Valid Data Tri-stated Data3 Valid Data2 Data3 Data1 Valid Data Active Data Active |
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