MTC20136

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External pins

These physical pins are used for different logical functions, depending on the external device which is ac-

cessed. The correspondance between physical and logical functions is given in Table 1

B7

E_A2

EBI Address

A7

E_A3

EBI Address

C7

E_A4

EBI Address

D6

VDD

VDD

A6

VSS

VSS

B6

E_A5

EBI Address

C6

E_A6

EBI Address

A4

E_A7

EBI Address

D5

E_A8

EBI Address

B5

E_A9

EBI Address

A3

VDD

VDD

C5

VSS

VSS

B4

E_A10

EBI Address

A2

E_A11

EBI Address

B3

E_A12

EBI Address

B1

E_A13

EBI Address

E_D[15:0]

16 bit data, multiplexed address/data

E_A[19:0]

20 bit address (including commands for SDRAM)

nCS[7:4]

external chip select

E_CLK

external clock

ALE

Address Latch Enable

nRDYRCV

Ready/Recover driven by selected device together with external pull-up

nOE

output enable

nWE0

Write enable for LSB byte lane E_D[7:0]

nWE1

Write enable for MSB byte lane E_D[15:8]

Table 1.

Pin Name

MTC20135, MTC20455

access function

SDRAM

access function

SRAM/FEPROM

access function

E_A [19]

-

S_nRAS

E_A [19]

E_A [18]

-

S_nCAS

E_A [18]

E_A [17]

-

S_DQM0

E_A [17]

E_A [16]

-

S_DQM1

E_A [16]

LFBGA160 Pin Configuration (continued)

Pin#

Name

Function