CS5321/22

DS454F2

15

measurements performed under static conditions)

Notes: 27. Device is intended to be driven with CMOS logic levels.

28. Device is intended to be interfaced to CMOS logic. Resistive loads are not recommended on these pins.

0V)

Notes: 29. The maximum voltage differential between the Positive Supply of the CS5321 and the Positive Digital

Supply of the CS5322 must be less than 0.25 V.

Notes: 30. Transient currents of up to 100 mA will not cause SCR latch up.

*WARNING: Operation beyond these limits may result in permanent damage to the device. Normal operation is

not guaranteed at these extremes.

Parameter

Symbol

Min

Typ

Max

Units

High-Level Input Drive Voltage

(VD+)-0.3

-

-

V

Low-Level Input Drive Voltage

--

0.3

V

High-Level Input Threshold

(Note 27)

(VD+)-1.0

-

-

V

Low-Level Input Threshold

(Note 27)

-

-

1.0

V

High-Level Output Voltage IOUT = -40

µA

(Note 28)

(VD+)-0.6

-

-

V

Low-Level Output Voltage IOUT = +1.6 mA

(Note 28)

--

0.4

V

Input Leakage Current

All pins except MFLG, SOD

--

±10

µA

Three-State Leakage Current

--

±10

µA

Digital Input Capacitance

-9

-

pF

Digital Output Capacitance

-9

-

pF

Parameter

Symbol

Min

Typ

Max

Units

DC Supply:

(Note 29)

Positive

Negative

VD+

VD-

4.75

-4.75

5.0

-5.0

5.25

-5.25

V

V

Ambient Operating Temperature

-BL

-40

-

+85

°C

Parameter

Symbol

Min

Typ

Max

Units

DC Supply:

(Note 29)

Positive

Negative

VD+

VD-

-0.3

0.3

-

-

(VD+)+0.3

-6.0

V

V

Input Current, Any Pin Except Supplies

(Note 30)

--

±10

mA

Digital Input Voltage

VIND

-0.3

-

(VD+)+0.3

V

Storage Temperature

-65

-

150

°C