CS5321 datasheet(25/36 Pages) CIRRUS

25 / 36 page

CS5321/22

DS454F2

Note that a write will occur when CS = 0 and R/W

= 0 even if SCLK is not toggled. Failure to clock in

data with the appropriate number of SCLKs can

leave the configuration register in an indeterminate

condition.

The serial bit stream is received MSB first, LSB

last. The order of the input control data is PWDN

first, followed by ORCAL, USEOR, CSEL, Re-

served, DECC, DECB, and DECA. The configura-

tion data bits are defined in Table 2. The

configuration data controls device operation only

when in the software mode, i.e., the H/S pin is low

(H/S = 0). The Reserved configuration data bit

must always be written low.

2.16 Offset Calibration Operation

The offset calibration routine computes the offset

produced by the CS5321 modulator and stores this

value in the offset register. The USEOR pin or bit

determines if the offset register data is to be used to

correct output words.

After power is applied to the chip set the CS5322

must be RESET. To begin an offset calibration, the

CS5321 analog input must represent the offset val-

ue. Then in software mode (H/S = 0) the ORCAL

bit must be toggled from a low to a high. In hard-

ware mode the ORCAL pin must be toggled low

for at least one CLKIN cycle, then taken high (ex-

cept when ORCAL = 1 and the CS5322 is RESET

as this toggles the ORCAL internally). After OR-

CAL has been toggled, the SYNC signal must be

applied to the CS5322. The filter settles on the in-

put value in 56 output words. The output word rate

is determined by the state of the decimation rate

control pins, DECC, DECB, and DECA. On the

57th output word, the CS5322 issues the OR-

CALD status flag, outputs the offset data sample,

and internally loads the offset register. During cal-

ibration, the offset register value is not used.

If USEOR is high (USEOR=1), subsequent sam-

ples will have the offset subtracted from the output.

The state of USEOR must remain high for the com-

plete duration of the convolution cycle. If USEOR

is low (USEOR=0), the output word is not correct-

ed, but the offset register retains its value for later

use. The results of the last calibration will be held

in the offset register until the end of a new calibra-

tion, or until the CS5322 is reset using the RESET

pin. USEOR does not alter the offset register value,

only its usage.

To restart a calibration, ORCAL and SYNC must

be taken low for at least one CLKIN cycle. OR-

CAL must then be taken high. The calibration will

restart on the next SYNC event. If the ORCAL pin

remains in a high state, only a single calibration

will start on the first SYNC signal.

Input Bit #

Equivalent Hardware

Function

Description

1 (MSB)

PWDN

Standby mode

ORCAL

Self-offset calibration

USEOR

Use Offset Register

CSEL

Channel Select

Reserved

Factory use only

DECC

Filter BW selection

DECB

Filter BW selection

8 (LSB)

DECA

Filter BW selection

Table 2. Configuration Data Bits

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