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CS42448 数据表(PDF) 44 Page - Cirrus Logic

部件名 CS42448
功能描述  108 dB, 192 kHz 6-in, 8-out CODEC
PDF  70 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS42448 数据表(HTML) 44 Page - Cirrus Logic

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44
DS648PP2
6
REGISTER DESCRIPTION
All registers are read/write except for the I.D. and Revision Register and Interrupt Status Register which
are read only. See the following bit definition tables for bit assignment information. The default state of
each bit after a power-up sequence or reset is listed in each bit description.
6.1
MEMORY ADDRESS POINTER (MAP)
Not a register
6.1.1
INCREMENT(INCR)
Default = 1
Function:
Memory address pointer auto increment control
0 - MAP is not incremented automatically.
1 - Internal MAP is automatically incremented after each read or write.
6.1.2
MEMORY ADDRESS POINTER (MAP[6:0])
Default = 0000001
Function:
Memory address pointer (MAP). Sets the register address that will be read or written by the control
port.
6.2
CHIP I.D. AND REVISION REGISTER (ADDRESS 01H) (READ ONLY)
6.2.1
CHIP I.D. (CHIP_ID[3:0])
Default = 0001
Function:
I.D. code for the CS42448. Permanently set to 0001.
6.2.2
CHIP REVISION (REV_ID[3:0])
Default = 0001
Function:
CS42448 revision level. Revision A is coded as 0001.
7
654
32
10
INCR
MAP6
MAP5
MAP4
MAP3
MAP2
MAP1
MAP0
7
654
32
10
Chip_ID3
Chip_ID2
Chip_ID1
Chip_ID0
Rev_ID3
Rev_ID2
Rev_ID1
Rev_ID0



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