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FS32K148UFT0VLHT 数据表(PDF) 40 Page - NXP Semiconductors |
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FS32K148UFT0VLHT 数据表(HTML) 40 Page - NXP Semiconductors |
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40 / 100 page ![]() System Clock Generation (SCG) specifications 6.2.3.1 Fast internal RC Oscillator (FIRC) electrical specifications Table 29. Fast internal RC Oscillator electrical specifications for S32K1xx series Symbol Parameter1 Value Unit Min. Typ. Max. FFIRC FIRC target frequency — 48 — MHz ΔF Frequency deviation across process, voltage, and temperature < 105°C — ±0.5 ±1 %FFIRC ΔF125 Frequency deviation across process, voltage, and temperature < 125°C — ±0.5 ±1.1 %FFIRC TStartup Startup time 3.4 5 µs2 TJIT, 3 Cycle-to-Cycle jitter — 300 500 ps TJIT3 Long term jitter over 1000 cycles — 0.04 0.1 %FFIRC 1. With FIRC regulator enable 2. Startup time is defined as the time between clock enablement and clock availability for system use. 3. FIRC as system clock Table 30. Fast internal RC Oscillator electrical specifications for S32K14xW series Symbol Parameter1 Value Unit Min. Typ. Max. FFIRC FIRC target frequency — 48 — MHz ΔF Frequency deviation across process, voltage, and temperature — ±0.5 ±1.4 %FFIRC TStartup Startup time 3.4 5 µs2 TJIT, 3 Cycle-to-Cycle jitter — 300 500 ps TJIT3 Long term jitter over 1000 cycles — 0.04 0.1 %FFIRC 1. With FIRC regulator enable 2. Startup time is defined as the time between clock enablement and clock availability for system use. 3. FIRC as system clock NOTE Fast internal RC oscillator is compliant with LIN when device is used as a slave node. 6.2.3 System Clock Generation (SCG) specifications S32K1xx Data Sheet, Rev. 13, 04/2020 40 NXP Semiconductors |
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