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AS29F010 数据表(PDF) 2 Page - Alliance Semiconductor Corporation |
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AS29F010 数据表(HTML) 2 Page - Alliance Semiconductor Corporation |
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2 / 10 page ![]() $65<)343 $65<)343 $65<)343 $65<)343 ® 5555 $//,$1&(#6(0,&21'8&725 $//,$1&(#6(0,&21'8&725 $//,$1&(#6(0,&21'8&725 $//,$1&(#6(0,&21'8&725 ','#4407333:0$1#72:233 ','#4407333:0$1#72:233 ','#4407333:0$1#72:233 ','#4407333:0$1#72:233 )XQFWLRQDO#GHVFULSWLRQ The AS29F010 is a high performance 1 megabit 5 volt-only Flash memory organized as 128K bytes of 8 bits each. It is divided into four sectors of 32K bytes each. Each sector is separately erased and programmed without affecting data in the other sectors. All program, erase, and verify operations are 5-volt only, and require no external 12V supply pin. All required features for in-system programmability are provided. The AS29F010 provides high performance with a maximum access time of 120, or 150 ns. Chip Enable ( CE), Output Enable ( OE), and Write Enable (WE) pins allow easy interface with the system bus. Program, erase, and verify operations are controlled with an on-chip command register using a JEDEC standard Write State Machine approach to enter commands. Each command requires four write cycles to be executed. Address and data are latched internally during all write, erase, and verify operations, and an internal timer terminates each command. The chip has a typical timer period of 200 µs for all commands but Erase, which has a typical period of 800 ms. Under nominal conditions, a sector can be completely programmed and verified in less than 12 seconds. To program, erase, and verify a sector typically takes less than 18 seconds. Data protection is provided by a low-VCC lockout and by error checking in the Write State Machine. DATA polling and Toggle Bit modes are used to show that the chip is executing a command when the AS29F010 is read during a write or erase operation. After Erase or P ogram commands,Verify-1 andVerify-0 command modes ensure sufficient margin for reliable operation. (See command summary on page 5.) The AS29F010 is packaged in 32-pin DIP, PLCC and TSOP packages with JEDEC standard pinouts for one megabit Flash memories. $UUD\#DUFKLWHFWXUH#DQG#GDWD#SRODULW\ The array consists of 128K (131,072) bytes divided into four sectors of 32K bytes each. Addresses A15 and A16 select the four sectors: The AS29F010 is shipped in the erased state with all bits set to 1. Programmed bits are set to 0. Data is programmed into the a ray one byte at a time. All programmed bits remain set to 0 until the sector is erased and verified using the SectorErase and Verify algorit hm. Erase returns all bytes in a 32K sector to the erased state FFh, or all bits set to 1. Each sector is erased individually with no effect on the other sectors. 2SHUDWLQJ#PRGHV The AS29F010 is controlled by a Write State Machine (WSM) that interprets and executes commands. At power-up the WSM is reset to normal read mode. Once a command is initiated by writing data into the DQ pins with the WE pin, the WSM enters the command mode and keeps the chip powered up until the command is finished. After the command is terminated by the internaltimer, the WSM returns to the normal read mode. Sector Address range Address pins Function 0 00000h–07FFFh A0–A5 CA: Column addresses 00–3Fh 1 08000h–0FFFFh A6–A14 RA: Row addresses 000–1FFh 2 10000h–17FFFh A15–A16 SA: Sector addresses 0–3h 3 18000h–1FFFFh |
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